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The Case for a Single-Chip Multiprocessor
"... Advances in IC processing allow for more microprocessor design options. The increasing gate density and cost of wires in advanced integrated circuit technologies require that we look for new ways to use their capabilities effectively. This paper shows that in advanced technologies it is possible to ..."
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to implement a single-chip multiprocessor in the same area as a wide issue superscalar processor. We find that for applications with little parallelism the performance of the two microarchitectures is comparable. For applications with large amounts of parallelism at both the fine and coarse grained levels
Tradeoffs in the Design of Single Chip Multiprocessors
- 2nd International Conference on Parallel Architectures and Compilation Techniques (PACT94
, 1994
"... : By the end of the decade, as VLSI integration levels continue to increase, building a multiprocessor system on a single chip will become feasible. In this paper, we propose to analyze the tradeoffs involved in designing such a chip, and specifically address whether to allocate available chip area ..."
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Cited by 6 (1 self)
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: By the end of the decade, as VLSI integration levels continue to increase, building a multiprocessor system on a single chip will become feasible. In this paper, we propose to analyze the tradeoffs involved in designing such a chip, and specifically address whether to allocate available chip area
ASOC: A Scalable, Single-Chip Communications Architecture
, 2000
"... Draft - submitted to PACT'00. Do not distribute. Contact authors for final version. Over the past decade the number of transistors available to VLSI chip designers has grown exponentially. While the physical capacity to integrate large systems on a single chip will soon be available, there is c ..."
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Cited by 60 (3 self)
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Draft - submitted to PACT'00. Do not distribute. Contact authors for final version. Over the past decade the number of transistors available to VLSI chip designers has grown exponentially. While the physical capacity to integrate large systems on a single chip will soon be available
The emerging Single Chip Heterogeneous Multiprocessor
"... Emerging single-chip heterogeneous multiprocessors feature hundreds of design elements contending for shared resources, making it difficult to isolate performance impacts of individual design changes. This work is the first to parameterize shared resource accesses in the form of access attributes, s ..."
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Emerging single-chip heterogeneous multiprocessors feature hundreds of design elements contending for shared resources, making it difficult to isolate performance impacts of individual design changes. This work is the first to parameterize shared resource accesses in the form of access attributes
Single-Chip Cmos Optical Microspectrometer
, 2000
"... containing an array of 16 addressable Fabry-Perot etalons (each one with different resonance cavity length), photodetectors and circuits for readout, multiplexing and driving a serial bus interface has been fabricated. The result is a chip that can operate using only five external connections (inclu ..."
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Cited by 6 (1 self)
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containing an array of 16 addressable Fabry-Perot etalons (each one with different resonance cavity length), photodetectors and circuits for readout, multiplexing and driving a serial bus interface has been fabricated. The result is a chip that can operate using only five external connections
The Design and Test of the Single Chip Integration Accelerometer Gyroscope
"... Abstract: A single chip integration accelerometer is designed in this paper. By means of a silicon mass, it integrated the measurement of the two kinds of the inertial parameter on a single chip. The paper analyzed the measurement theory of the accelerometer gyroscope. And then some experiment to te ..."
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Cited by 1 (1 self)
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Abstract: A single chip integration accelerometer is designed in this paper. By means of a silicon mass, it integrated the measurement of the two kinds of the inertial parameter on a single chip. The paper analyzed the measurement theory of the accelerometer gyroscope. And then some experiment
Memory optimization in single chip network switch fabrics
- In Design Automation Conference
, 2002
"... Moving high bandwidth (10Gb/s+) network switches from the large scale, rack mount design space to the single chip design space requires a re-evaluation of the overall design requirements. In this paper, we explore the design space for these single chip devices by evaluating the ITRS. We find that un ..."
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Cited by 6 (0 self)
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Moving high bandwidth (10Gb/s+) network switches from the large scale, rack mount design space to the single chip design space requires a re-evaluation of the overall design requirements. In this paper, we explore the design space for these single chip devices by evaluating the ITRS. We find
THPM 19.4 A SINGLE-CHIP MP@HL HDTV DECODER WITH INTEGRATED AUDIO DECODING AND DISPLAY PROCESSING UNITS
"... In this paper, a single-chip ..."
Results 11 - 20
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6,445