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Abstract: In this paper, a low-power approach to the design of embedded VLIW processor architectures is proposed. To solve the most part of data hazards in the pipeline, processors use forwarding (or bypassing) hardware to provide the required operands from the inter-stage pipeline registers directly to the inputs of the function units. The operands are then stored in the Register File during the write-back pipeline stage. In this paper, we propose a power optimization technique based on the exploitation ... (Update)
Context of citations to this paper: More
.... principle to avoid writing dead values back into the register file after forwarding has occurred in the pipeline, as a power optimization [18]. Taking these ideas a step further, it is possible to conceive of a general predication system wherein predicates are explicitly...
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BibTeX entry: (Update)
M. Sami, D. Sciuto, C. Silvano, et al., "Exploiting data forwarding to reduce the power budget of VLIW embedded processors," in Proc. Design, Automation and Test in Europe, pp. 252--257, 2001. http://citeseer.ist.psu.edu/sami01exploiting.html More
@misc{ sami01exploiting,
author = "M. Sami and D. Sciuto and C. Silvano",
title = "Exploiting data forwarding to reduce the power budget of VLIW embedded
processors",
text = "M. Sami, D. Sciuto, C. Silvano, et al., Exploiting data forwarding to reduce
the power budget of VLIW embedded processors, in Proc. Design, Automation
and Test in Europe, pp. 252--257, 2001.",
year = "2001",
url = "citeseer.ist.psu.edu/sami01exploiting.html" }
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