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Abstract: This paper describes a timing tool being developed by a real-time research group at Seoul National University. Our focus is on the issues resulting from advanced architectural features such as pipelined execution and cache memories found in many modern RISC-style processors. For each architectural feature we state the issues and explain our approach. 1 Introduction In real-time computing systems, tasks have timing requirements (i.e., deadlines) that must be met for correct operation. Various... (Update)
Context of citations to this paper: More
.... analysis tools to determine an upper bound on execution time or power consumption, without requiring a specific input vector [32] [34]. The following information establishes the relationships between tasks and processors: ffl A two dimensional array indicating the...
.... computes conservative execution times of tasks on a reduced instruction set computer, taking into account pipelining and cache effects [89]. Communication between PEs, or between the hardware and software portions of an embedded system, has drawn the attention of a few authors....
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BibTeX entry: (Update)
B.-D. Rhee et al., "Issues of advanced architectural features in the design of a timing tool," in Proc. Workshop Real-Time Operating Systems and Software, pp. 59--62, May 1994. http://citeseer.ist.psu.edu/rhee94issues.html More
@misc{ rhee94issues,
author = "B. Rhee",
title = "Issues of advanced architectural features in the design of a timing tool",
text = "B.-D. Rhee et al., Issues of advanced architectural features in the design
of a timing tool, in Proc. Workshop Real-Time Operating Systems and Software,
pp. 59--62, May 1994.",
year = "1994",
url = "citeseer.ist.psu.edu/rhee94issues.html" }
Citations (may not include all citations):167 Calculating the maximum execution time of real-time programs (context) - Puschner, Koza - 1989 DBLP
103 Experiments with a program timing tool based on source-level.. (context) - Park, Shaw - 1990
97 The Architecture of Pipelined Computers (context) - Kogge - 1981
92 Reasoning about time in higherlevel language software - Shaw - 1989
83 A retargetable technique for predicting execution time - Harmon, Baker et al. - 1992 DBLP
63 A code generation interface for ANSI C - Fraser, Hanson - 1990 ACM DBLP
55 Pipelined processors and worst-case execution times - Zhang, Burns et al. - 1993
54 Evaluating tight execution time bounds of programs by annota.. (context) - Mok - 1989
24 Predicting instruction cache behavior - Mueller, Whalley et al. - 1993
21 A Real-Time Language with a Schedulability Analyzer (context) - Stoyenko - 1987 ACM
20 Predicting Deterministic Execution Times of Real-Time Progra.. (context) - Park - 1992 ACM
5 An accurate instruction cache analysis technique for real-ti.. - Lim, Min et al. - 1994
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Analysis of Cache-related Preemption Delay in.. - Lee, Hahn, Seo.. (1996) (Correct)
A Dual-mode Instruction Prefetch Scheme for Improved Worst Case .. - Minsuk Lee (1993) (Correct)
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