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Abstract:

Although component-based software development promises increased reuse and faster development time, it has proven difficult to build component-based systems software. One obstacle is that the concurrency structure in systems software tends to be complex. First, instead of a single scheduler, there is a hierarchy of schedulers: the processor schedules interrupts, the OS schedules software interrupts and threads, and threads run event loops. This gives rise to many different execution environments, each with its own restrictions on actions that can be taken by code running in it. Second, the preemption relationships between these execution environments are often asymmetric: an interrupt handler can preempt a thread but not vice versa. This results in an asymmetric pattern of locking where low priority code must protect against high priority code but not vice versa. This situation is rare in other application domains but common in systems software. We have developed Task/Scheduler Logic (TSL) for reasoning about component-based systems software. We show that TSL can be used to reason about race conditions, illegal lock usage, and redundant or unnecessary synchronization points in component-based systems software. Further, we show that TSL can realistically be applied to large, complex systems. 1.

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