Alex Ramírez, Josep-L. Larriba-Pey, Carlos Navarro, Xavi Serrano, Josep Torrellas, Mateo Valero  Home/Search
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Abstract: Instruction fetch bandwidth is feared to be a major limiting factor to the performance of future wide-issue aggressive superscalars. Consequently, it is crucial to develop techniques to increase the number of useful instructions per cycle provided to the processor. Unfortunately, most of the past work in this area has largely focused on engineering workloads, rather than on the more challenging, badly-behaved popular commercial workloads. In this paper, we focus on Database applications running ... (Update)
Context of citations to this paper: More
...functions. It is possible to obtain better results with a seed selection based on the internal structure of the code, as we show in [12]. However access to the source code of applications is not always granted, and gaining such deep understanding of the code is a time...
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BibTeX entry: (Update)
Alex Ramirez, Josep Ll. Larriba-Pey, Carlos Navarro, Xavi Serrano, Josep Torrellas, and Mateo Valero. Code reordering of decision support systems for optimized instruction fetch. Technical Report UPC-DAC-1998-56, Universitat Politecnica de Catalunya, December 1998. http://citeseer.ist.psu.edu/ramirez98code.html More
@misc{ ramirez98code,
author = "A. Ramirez and J. Ll and L. Carlos and N. Xavi and S. Josep and T. Mateo",
title = "Code reordering of decision support systems for optimized instruction fetch",
text = "Alex Ramirez, Josep Ll. Larriba-Pey, Carlos Navarro, Xavi Serrano, Josep
Torrellas, and Mateo Valero. Code reordering of decision support systems
for optimized instruction fetch. Technical Report UPC-DAC-1998-56, Universitat
Politecnica de Catalunya, December 1998.",
year = "1998",
url = "citeseer.ist.psu.edu/ramirez98code.html" }
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