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Abstract: This work proposes an approach for high level design guidance for low power using properties of given algorithms and architectures. Several relevant properties (operation count, the ratio of critical path to available time, spatial locality, and regularity) are identified and discussed, with quantitative measures being proposed for the latter two. Significant emphasis is placed on exploiting the regularity and spatial locality algorithm properties for the optimization of interconnect power.... (Update)
Context of citations to this paper: More
...can improve the efficiency. Furthermore, for portable applications dedicated hardware may be required to reduce power consumption [2]. However, the integration of a processor core and application specific blocks introduces the problem of partitioning the system into...
...than specification refinement techniques. Design guidance at the algorithmic level based on several algorithmic properties is offered in [9]. Design of algorithms for image and video coding with low power characteristics is described in [6] 9] The algorithms described in [6]...
Cited by: More
Behavioral Level Guidance Using Property-Based Design.. - Lisa Marie Guerra (1996) (Correct)
High Level Synthesis Techniques for Low Power Design' A.. - Saraju Mohanty Dept (Correct)
Design techniques for energy efficient and low-power systems - Havinga (Correct)
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0.1: A Methodology for Guided Behavioral-Level Optimization - Lisa Guerra Miodrag (1998) (Correct)
0.1: Exploiting Regularity for Low-Power Design - Renu Mehra (1996) (Correct)
0.0: Behavioral Profiling Based High Level Power Estimation.. - Katkoori (Correct)
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0.2: Exploiting Locality for Low-Power Design - Mehra, Guerra, Rabaey (1996) (Correct)
0.2: Low-Power Architectural Synthesis and the Impact of.. - Mehra, Guerra, Rabaey (1996) (Correct)
0.2: An Integrated CAD Environment for Low-Power Design - Landman, Mehra, Rabaey (1995) (Correct)
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5: Exploiting regularity for low-power design - Mehra, Rabaey - 1996
4: Rabaey J. et al.: "Low Power Design of Memory Intensive Functions Case Study: Vector Quantization", IEEE VLSI Signal Processing Conference, 1994. 1/5/97 page 11 energy
4: A Portable Multimedia Terminal (context) - Sheng, Chandrakasan et al. - 1992
BibTeX entry: (Update)
Rabaey J., Guerra L., Mehra R.: "Design guidance in the Power Dimension", Proceedings of the ICASSP, 1995. http://citeseer.ist.psu.edu/rabaey95design.html More
@misc{ rabaey95design,
author = "J. Rabaey and L. Guerra and R. Mehra",
title = "Design guidance in the Power Dimension",
text = "Rabaey J., Guerra L., Mehra R.: Design guidance in the Power Dimension,
Proceedings of the ICASSP, 1995.",
year = "1995",
url = "citeseer.ist.psu.edu/rabaey95design.html" }
Citations (may not include all citations):107 Optimizing Power Using Transformations - Chandrakasan, Potkonjak et al. - 1995
73 New Spectral Methods for Ratio Cut Partitioning and Clusteri.. (context) - Hagen, Kahng - 1992
49 Kolmogorov Complexity and its Applications (context) - Li, Vitanyi - 1990 ACM DBLP
40 Estimating Power Dissipation of VLSI Signal Processing Chips.. (context) - Powell, Chau - 1990
38 Power Estimation for High Level Synthesis (context) - Landman, Rabaey - 1993
36 Behavioral Level Power Estimation and Exploration - Mehra, Rabaey - 1994
26 Characterizing Parallel Algorithms (context) - Jamieson - 1987
13 System-Level Design Guidance Using Algorithm Properties (context) - Guerra, Potkonjak et al. - 1994
The graph only includes citing articles where the year of publication is known.
Documents on the same site (http://infopad.eecs.berkeley.edu/~renu/work.html): More
Exploiting Regularity for Low-Power Design - Renu Mehra (1996) (Correct)
Optimizing Power Using Transformations - Chandrakasan, Potkonjak, Mehra.. (1995) (Correct)
Low-Power Architectural Synthesis and the Impact of.. - Mehra, Guerra, Rabaey (1996) (Correct)
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