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Abstract: We introduce a transformation, named rephasing, that manipulates the timing parameters in control -dataflow graphs. Traditionally high-level synthesis systems for DSP have either assumed that all the relative times, called phases, when corresponding samples are available at input and delay nodes are zero or have automatically assigned values to as part of the scheduling step when software pipelining is simultaneously applied. (Update)
Context of citations to this paper: More
.... frequently applied transformation in HLS [71] Other commonly used transformations include loop folding [23, 88] software pipelining [26, 77], and retiming [76] Hardware specific transformations at the logic, RT and system levels can be applied to the intermediate...
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BibTeX entry: (Update)
M. Potkonjak and M. Srivastava, "Rephasing: A Transformation Technique for the Manipulation of Timing Constraints," Proceedings of the Design Automation Conference (DAC), pp. 107-112, 1995. http://citeseer.ist.psu.edu/potkonjak95rephasing.html More
@inproceedings{ potkonjak95rephasing,
author = "Miodrag Potkonjak and Mani B. Srivastava",
title = "Rephasing: A Transformation Technique for the Manipulation of Timing Constraints",
booktitle = "Design Automation Conference",
pages = "107-112",
year = "1995",
url = "citeseer.ist.psu.edu/potkonjak95rephasing.html" }
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207 Retiming Synchronous Circuitry (context) - Leiserson, Saxe - 1991
148 Combinatorial Optimization: Networks and Matroids (context) - Lawler - 1976
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33 Loop Optimization in register-transfer scheduling for DSP-sy.. (context) - Goossens, Wandewalle et al. - 1989
27 Scheduling and Binding Algorithms for High-Level Synthesis (context) - Paulin, Knight - 1989
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11 Valid Clocking in Wavepipelined Circuits (context) - Lam, Brayton et al. - 1992
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10 Hyper-LP: A Design System for Power Minimization using Archi.. (context) - Chandrakasan - 1992
9 A Timing Analysis of Level-Clocked Circuitry (context) - Ishii, Leiserson - 1990
7 Inserting Active Delay Elements to achieve wave pipelining (context) - Wong, De Micheli et al. - 1989
3 Optimal Clocking Schemes for High Speed Digital Systems (context) - Unger, Tan - 1986
3 On cycle means and cycle staffing (context) - Hartman - 1990
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