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Cost Optimization in ASIC Implementation of Periodic Hard-Real Time Systems using Behavioral Synthesis Techniques (1995)  (Make Corrections)  (13 citations)
Miodrag Potkonjak, Wayne Wolf



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Abstract: Modern applications are often defined as sets of several computational tasks. This paper presents a synthesis algorithm for ASIC implementations which realize multiple computational tasks under hard real-time deadlines. The algorithm analyzes constraints imposed by task sharing as well as the traditional datapath synthesis criteria. In particular, we demonstrated an efficient technique to combine rate-monotonic scheduling, a widely used hard real-time systems scheduling discipline, with... (Update)

Context of citations to this paper:   More

.... a solution was proposed for ASIP design, derived from a very similar solution for systems with concurrent processes but without variants [45]. Different tasks with timing requirements were serialized into a single large sequential process which was, then, synthesized such...

.... market pressure to reduce system cost for consumer products has spurred the development of system level synthesis techniques [5] 10] [28]. The developed system synthesis techniques have been focused on task scheduling and resource allocation algorithms [23] and interface...

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BibTeX entry:   (Update)

M. Potkonjak, W.H. Wolf, "Cost Optimization in ASIC implementation of Periodic Hard-Real Time Systems using Behavioral Synthesis Techniques", ICCAD95, pp. 446-451, 1995. http://citeseer.ist.psu.edu/potkonjak95cost.html   More

@inproceedings{ potkonjakcost,
    author = "M. Potkonjak and W. Wolf",
    title = "Cost Optimization in {ASIC} Implementation of Periodic Hard-Real Time Systems Using Behavioral Synthesis Techniques",
    pages = "446--451",
    url = "citeseer.ist.psu.edu/potkonjak95cost.html" }
Citations (may not include all citations):
1582   Scheduling Algorithms for Multiprogramming in a Hard Real Ti.. - Liu, Layland - 1973
336   The Rate Monotonic Scheduling Algorithms - Exact Characteriz.. (context) - Lehoczky, Sha et al. - 1986
163   Hardwaresoftware co-synthesis for microcontrollers (context) - Ernst, Henkel et al. - 1993
150   Static Scheduling of Synchronous Data Flow Programs for Digi.. (context) - Lee, Messerschmitt - 1987
138   The High-Level Synthesis of Digital Systems (context) - McFarland, Parker et al. - 1990
137   Hardware-software cosynthesis for digital systems - Gupta, De Micheli - 1993
114   Fast Prototyping of Datapath-Intensive Architectures (context) - Rabaey - 1991
107   Optimizing Power Using Transformations - Chandrakasan - 1995
106   Hardware-Software Co-Design of Embedded Systems (context) - Wolf - 1994
82   Real-Time Scheduling Theory and Ada (context) - Sha, Goodenough - 1990
45   Specification Partitioning for System Design (context) - Vahid, Gajski - 1992
36   A method for partitioning UNITY language in hardware and sof.. - Barros, Rosenstiel et al. - 1994
27   Partitioning Before Logic Synthesis (context) - Camposano, Brayton - 1987
19   Codesign of Architecture for Automotive Powertrain Modules (context) - Hu - 1994
13   Architectural Partitioning for System Level Design (context) - Lagnese, Thomas - 1989
12   High Level Synthesis for Reconfigurable Datapath Structures (context) - Guerra, Potkonjak et al. - 1993
12   Integration of MediumThroughput Signal Processing Algorithms.. - Goossens - 1995
10   Computer-Aided Partitioning of Behavioral Hardware Descripti.. (context) - McFarland - 1983
9   Retargetable Assembly Code Generation by Bootstrapping - Leupers, Schednk et al. - 1994
7   Algorithm Selection: A Quantitative Computation Intensive Op.. (context) - Potkonjak, Rabaey - 1994



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