P. Poplavko, T. Basten, M. Bekooij, J. van Meerbergen, B. Mesman  Home/Search
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Abstract: We consider a dynamic application running on a multiprocessor network-on-chip as a set of independent jobs, each job possibly running on multiple processors. To provide guaranteed quality and performance, the scheduling of jobs, jobs themselves and the hardware must be amenable to timing analysis. For a certain class of applications and multiprocessor architectures, we propose exact timing models that effectively co-model both the computation and communication of a job. The models are based on... (Update)
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BibTeX entry: (Update)
P. Poplavko, T. Basten, M. Bekooij, J. van Meerbergen, and B. Mesman, Task-level timing models for guaranteed performance in multiprocessor networks-on-chip, CASES'03, San Jose, California, USA, Oct.30-Nov.1 2003. http://citeseer.ist.psu.edu/poplavko03tasklevel.html More
@misc{ poplavko03tasklevel,
author = "P. Poplavko and T. Basten and M. Bekooij and J. van Meerbergen and B. Mesman",
title = "Task-level timing models for guaranteed performance in multiprocessor networks-on-chip",
text = "P. Poplavko, T. Basten, M. Bekooij, J. van Meerbergen, and B. Mesman, Task-level
timing models for guaranteed performance in multiprocessor networks-on-chip,
CASES'03, San Jose, California, USA, Oct.30-Nov.1 2003.",
year = "2003",
url = "citeseer.ist.psu.edu/poplavko03tasklevel.html" }
Citations (may not include all citations):150 Static Scheduling of Synchronous Data Flow Programs for Digi.. (context) - Lee, Messerschmitt - 1987
131 Parallel Computer Architecture HardwareSoftware Approach (context) - Singh, Architecture et al. - 1999
34 Grape-II: A System-Level Prototyping Environment for DSP App.. (context) - Lauwereins, Engels et al. - 1995
31 Scheduling of DSP Programs onto Multiprocessors for Maximum .. (context) - Hoang, Rabaey - 1993
17 Trade Offs in the Design of a Router with Both Guaranteed an.. - Rijpkema, Goossens et al. - 2003
11 Embedded Multiprocessors: Scheduling and Synchronization (context) - Sriram, Bhattacharyya - 2002
7 YAPI: Application Modeling for Signal Processing Systems (context) - Kock - 2000
7 Guaranteeing the Quality of Services in Networks on Chip - Goossens - 2003
6 New York: Wiley (context) - Baccelli, Cohen et al. - 1992
5 MACs Multiprocessor DSP (context) - Chip, Multiprocessor et al. - 2000
5 Heterogeneous Multiprocessor for the Management of Real-time.. (context) - Strik, Timmer et al. - 2000
3 Pipeline-Based Approach for Scheduling Video Processing Algo.. (context) - Yang, Kasturi et al. - 2003
2 A Large-Area Integrated Multiprocessor System for Video Appl.. (context) - Rudack, Redeker et al. - 2002
2 Intermediate Representations for Design Automation of Multip.. (context) - Bambha, Kianzad et al. - 2002
1 Rate-Optimal Schedule for Multi-Rate DSP Applications (context) - Govindarajan, Gao - 1995
1 Minimizing Buffer Requirements under Rate-Optimal Schedule i.. - Govindarajan, Gao et al. - 2002
1 Faster Maximum and Minimum Cycle Algorithms for System-Perfo.. (context) - Dasdan, Gupta - 1998
1 Practical Experiences: Multiprocessor Mapping of Process Net.. (context) - Kock - 2002
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