(Enter summary)
Abstract: This paper presents flit-reservation flow control, in which
control flits traverse the network in advance of data flits,
reserving buffers and channel bandwidth. Flit-reservation
flow control requires control flits to precede data flits,
which can be realized through fast on-chip control wires or
the pipelining of control flits one or more cycles ahead of
data flits. Scheduling ahead of data arrival enables buffers
to be held only during actual buffer usage, unlike existing
flow control... (Update)
Cited by: More
Low-Latency Virtual-Channel Routers for On-Chip Networks - Robert Mullins Andrew (2004)
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Selecting a Timing Regime for On-Chip Networks - Robert Mullins Jeong-Gun
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Flit Ejection in On-chip Wormhole-switched Networks with.. - Lu, Jantsch (2004)
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BibTeX entry: (Update)
Li-Shiuan Peh and William J. Dally, "Flit-Reservation Flow Control", In Proceedings of 6th International Symposium on High-Performance Computer Architecture, Toulouse, January 2000. http://citeseer.ist.psu.edu/peh00flitreservation.html More
@inproceedings{ peh00flitreservation,
author = "Li-Shiuan Peh and William J. Dally",
title = "Flit-Reservation Flow Control",
booktitle = "{HPCA}",
pages = "73-84",
year = "2000",
url = "citeseer.ist.psu.edu/peh00flitreservation.html" }
Citations (may not include all citations):
624
Computer Networks (context) - Tanenbaum - 1996
462
Deadlock-free message routing in multiprocessor interconnect.. (context) - Dally, Seitz - 1987
223
Virtual cut-through: A new computer communication switching .. (context) - Kermani, Kleinrock - 1979
193
The Torus Routing Chip (context) - Dally, Seitz - 1986
144
Virtual-Channel Flow Control (context) - Dally - 1992
99
Interconnections Network - An Engineering Approach (context) - Duato, Yalamanchili et al. - 1997
76
A necessary and sufficient condition for deadlockfree adapti..
- Duato - 1995
76
A necessary and sufficient condition for deadlockfree routin..
- Duato - 1996
70
The Cosmic Cube (context) - Seitz - 1985
58
Digital Systems Engineering (context) - Dally, Poulton - 1998
39
Maps: A Compiler-Managed Memory System for Raw Machines
- Barua, Lee et al. - 1999
23
Dynamically-Allocated MultiQueue Buffers for VLSI Communicat.. (context) - Tamir, Frazier - 1992
13
VLSI Architecture: Past, Present, and Future (context) - Dally, Lacy - 1999
5
A high performance router architecture for interconnection n..
- Duato, Lopez et al. - 1996
The graph only includes citing articles where the year of publication is known.
Documents on the same site (http://www.princeton.edu/~peh/): More
A Delay Model and Speculative Architecture for Pipelined Routers - Peh, Dally (2001)
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Orion: A Power-Performance Simulator for Interconnection.. - Hang-Sheng Wang Xinping (2002)
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Energy-Efficient Computing for Wildlife Tracking.. - Juang, Oki, Wang, .. (2002)
(Correct)
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