(Enter summary)
Abstract: To provide flexibility in deploying new protocols and services,
general-purpose processing engines are being placed in the datapath of
routers. Such network processors are typically simple RISC multiprocessors
that perform forwarding and custom application processing of packets.
The inherent unpredictability of execution time of arbitrary instruction
code poses a significant challenge in providing QoS guarantees for data
flows that compete for such processing resources in the network. However,... (Update)
Context of citations to this paper: More
...a significant challenge in providing QoS guarantees for data flows that compete for such processing resource in the network. Pappu et al. [7] presented a processor scheduling algorithm called Estimation based Fair Queuing (EFQ) that estimated the execution times of various...
...of the three is interdependent. Thus fair allocation of one does not guarantee fair allocation of other. Some work has been done [5,6,7,8] on scheduling network resources but those allocate resource for a single resource. This does not directly extend to active networks....
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BibTeX entry: (Update)
. Prashanth Pappu and Tilman Wolf, "Scheduling Processing Resources in Programmable Routers", Department of computer science, Washington University in St. Louis, MO, USA, WUCS-01-32, July 25, 2001. http://citeseer.ist.psu.edu/pappu02scheduling.html More
@misc{ pappu01scheduling,
author = "P. Pappu and T. Wolf",
title = "Scheduling Processing Resources in Programmable Routers",
text = ". Prashanth Pappu and Tilman Wolf, Scheduling Processing Resources in Programmable
Routers, Department of computer science, Washington University in St. Louis,
MO, USA, WUCS-01-32, July 25, 2001.",
year = "2001",
url = "citeseer.ist.psu.edu/pappu02scheduling.html" }
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292
Service disciplines for guaranteed performance service in pa..
- Zhang - 1995
121
Start-time fair queuing: A scheduling algorithm for integrat..
- Goyal, Vin et al. - 1996
106
Private Network-Network Interface Specification Version
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62
A generalized processor sharing approach to flow control: Th.. (context) - Parekh, Gallager - 1992
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58
Design of a gigabit ATM switch
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A survey of programmable networks
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48
A survey of active network research
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44
CommBench - a telecommunications benchmark for network proce..
- Wolf, Franklin - 2000
43
Practical programmable packets
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35
NodeOS interface specification (context) - Peterson - 2001
33
A scalable, high performance active network node
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30
Worst case fair weighted fair queuing (context) - Bennett, Zhang - 1995
29
Configuring sessions in programmable networks
- Choi, Turner et al. - 2001
29
Rate proportional servers: A design methodology for fair que..
- Stiliadis, Varma - 1998
22
Scheduling computations on a software-based router (context) - Qie, Bavier et al. - 2001
18
Router Plugins - a modular and extensible software framework..
- Decasper, Dittia et al. - 1998
12
A hierarchial cpu scheduler for multimedia operating systems (context) - Goyal, Vin et al. - 1996
11
Fair queuing for aggregated multiple links
- Blanquer, Ozden - 2001
11
The smart port card: An embedded UNIX processor architecure .. (context) - DeHart, Richard et al.
9
Expressing meaningful processing requirements among heteroge..
- Galtier, Mills et al. - 2000
4
Hierarchial packet fair queuing algorithms (context) - Bennett, Zhang - 1996
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Documents on the same site (http://www.ecs.umass.edu/ece/wolf/f_publications.html): More
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Analysis and Performance of a Scalable Gigabit Active Router - Wolf
(Correct)
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