(Enter summary)
Abstract: In this paper we investigate properties of retirning, a circuit transformation which
preserves the behavior of the circuit as a whole. We present an algorithm which
transforms a given combinational circuit into a functionally equivalent pipelined circuit
with minimum latency and clock-period no greater than a given upper bound c. (Update)
Cited by: More
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3: Optimizing Synchronous Circuitry by Retiming (context) - Leiserson, Rose et al. - 1983
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BibTeX entry: (Update)
M. C. Papaefthymiou. On retiming synchronous circuitry and mixed-integer optimization. Master's thesis, Massachusetts Institute of Technology, September 1990. Available as MIT/LCS/TR-486. http://citeseer.ist.psu.edu/papaefthymiou90retiming.html More
@techreport{ papaefthymiou90retiming,
author = "M. C. Papaefthymiou",
title = "{ON} {RETIMING} {SYNCHRONOUS} {CIRCUITRY} {AND} {MIXED}-{INTEGER} {OPTIMIZATION}",
number = "MIT/LCS/TR-486",
pages = "68",
year = "1990",
url = "citeseer.ist.psu.edu/papaefthymiou90retiming.html" }
Citations (may not include all citations):
106
Optimizing synchronous systems (context) - Leiserson, nd et al. - 1983
102
A characterization of the minimum cycle mean in a digraph (context) - Karp - 1978
80
Optimizing synchronous circuitry by retiming (context) - Leiserson, Rose et al. - 1981
42
Algorithms and Complexity (context) - Papadimitriou, Steiglitz - 1982
15
New scaling algorithms for the assignment and minimum cycle .. (context) - Orlin, Ahuja - 1988
4
Massachusetts Institute of Technology (context) - Rose, VLSI et al. - 1982
3
A mixed-integer programming problem which is efficiently sol.. (context) - Leiserson, Saxe - 1988
2
MIT Laboratory for Computer Science (context) - Leiserson, Saxe et al. - 1988
2
Carnegie-Mellon University (context) - Leiserson, LS et al. - 1981
1
Pdne- hart and Winston (context) - Lawlet, Networks et al. - 1976
1
Iteger and Combinatorial Optimization (context) - Nemhauser, Vols - 1988
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A faster slrolgly polynomial minimum cost flow algorithm (context) - Orlin - 1988
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