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Hardware Implementation of an Elliptic Curve Processor over GF(p) (2002)  (Make Corrections)  
Siddika Berna Örs, Lejla Batina, Bart Preneel, Joos Vandewalle



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Abstract: This paper describes a hardware implementation of an arithmetic processor which is efficient for bit-lengths suitable for both commonly used types of Public Key Cryptography (PKC), i.e., Elliptic Curve (EC) and RSA Cryptosystems. Montgomery modular multiplication in a systolic array architecture is used for modular multiplication. The processor consists of special operational blocks for Montgomery Modular Multiplication, modular addition /subtraction, EC Point doubling/addition, modular... (Update)

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BibTeX entry:   (Update)

Sddka Berna Ors, Lejla Batina, and Bart Preneel. Hardware implementation of elliptic curve processor over GF(p). Technical report, NESSIE document NES/DOC/KUL/WP5/023, October 10, 2002. http://citeseer.ist.psu.edu/ors02hardware.html   More

@misc{ ors02hardware,
  author = "S. Ors and L. Batina and B. Preneel",
  title = "Hardware implementation of elliptic curve processor over GF",
  text = "Sddka Berna Ors, Lejla Batina, and Bart Preneel. Hardware implementation
    of elliptic curve processor over GF(p). Technical report, NESSIE document
    NES/DOC/KUL/WP5/023, October 10, 2002.",
  year = "2002",
  url = "citeseer.ist.psu.edu/ors02hardware.html" }
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1   Dual-field arithmetic unit for GF (context) - Wolkerstorfer

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