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Abstract: Current-generation microprocessors are designed to process instructions with one and two source operands at equal cost. Handling two source operands requires multiple ports for each instruction in structures--such as the register file and wakeup logic--which are often in the processor critical timing paths. We argue that these structures are overdesigned since only a small fraction of instructions require two source operands to be processed simultaneously. [n this paper, we propose the... (Update)
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BibTeX entry: (Update)
I. Kim and M. Lipasti. Half-price architecture. In Proceedings of the International Symposium on Computer Architecture, June 2003. http://citeseer.ist.psu.edu/kim03halfprice.html More
@misc{ kim03halfprice,
author = "I. Kim and M. Lipasti",
title = "Half-price architecture",
text = "I. Kim and M. Lipasti. Half-price architecture. In Proceedings of the International
Symposium on Computer Architecture, June 2003.",
year = "2003",
url = "citeseer.ist.psu.edu/kim03halfprice.html" }
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[Article contains additional citations not shown here]
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