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Abstract: A rate 1/n binary generic convolutional encoder is a shift-register circuit where the inputs u k are information bits and the outputs y k are blocks of n bits generated as linear combinations on the appropriate shift register contents. The decoding of the outputs of a convolutional encoder can be carried out by the well-known Viterbi algorithm. The communication pattern of the Viterbi Algorithm is given as a graph, called trellis, associated to the state diagram of the corresponding encoder.... (Update)
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BibTeX entry: (Update)
M. B'oo, F. Arguello, J.D. Bruguera, E.L. Zapata, Mapping of Trellises Associated with General Encoders onto High-Performance VLSI Architectures, Submitted. OUR METHOD PARALLEL METHOD Speed 1=tc M=tM Utilization 100 % 100 \Delta (M=tM ) % M restriction M ? log 2 (N) M ? log 2 (N) http://citeseer.ist.psu.edu/boo97mapping.html More
@misc{ b'oo-mapping,
author = "M. B'oo and F. Arguello and J. Bruguera and E. Zapata",
title = "Mapping of Trellises Associated with General Encoders onto High-Performance
VLSI Architectures",
text = "M. B'oo, F. Arguello, J.D. Bruguera, E.L. Zapata, Mapping of Trellises
Associated with General Encoders onto High-Performance VLSI Architectures,
Submitted. OUR METHOD PARALLEL METHOD Speed 1=tc M=tM Utilization 100 %
100 \Delta (M=tM ) % M restriction M ? log 2 (N) M ? log 2 (N)",
url = "citeseer.ist.psu.edu/boo97mapping.html" }
Citations (may not include all citations):313 The Viterbi Algorithm (context) - Forney - 1973
86 Channel Coding with Multilevel/phase signals (context) - Ungerboeck - 1982
44 Trellis Coded Quantization of Memoryless and Gauss-Markov so.. (context) - Marcellin, Fischer - 1990
10 Area-Efficient Architectures for the Viterbi Algorithm-PartI.. (context) - Shung, Ling et al. - 1993
10 Area-Efficient Architectures for the Viterbi Algorithm-PartI.. (context) - Shung, Ling et al. - 1993
7 Locally connected VLSI architectures for the Viterbi Algorit.. (context) - Gulak, Kailath - 1988
7 Unified Architecture for Divide and Conquer based Tridiagona.. (context) - L'opez, Zapata - 1994
6 Parallel Architecture for Fast Transforms with Trigonometric.. (context) - Arguello, Bruguera et al. - 1994
5 High-Performance VLSI Architecture for the Viterbi Algorithm - B'oo, Arguello et al.
5 Systolic array processing of the Viterbi Algorithm (context) - Chang, Yao - 1989
3 A processor for graph search algorithms (context) - Glinski, Lalumia et al. - 1987
3 The Iterative Collapse Algorithm: A Novel Approach for the D.. (context) - Daneshgaran, Yao - 1995
3 Transform Coding of Monochrome and Color Images Using Trelli.. (context) - Marcellin, Sriram et al. - 1993
2 Viterbi decoding by a systolic array (context) - Chang, Yao - 1985
1 Aplication-Specific Architecture for Fast Transforms based o.. (context) - Zapata, Arguello - 1993
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