Gate-level Power Estimation Using Tagged Probabilistic Simulation Chih-Shun...  Home/Search
Context
Related
| usc.edu/~massoud/Paper...tpsjournal.ps Cached: PS.gz PS PDF This document uses CoBlitz to cache paper downloads. If your firewall is blocking outgoing connections to port 3125, you can use these links to download local copies.
Image Update HelpPS.gz PS PDF From: usc.edu/~massou...lications_nocgi (more) (Enter author homepages) |
Rate this article:      (best)Comment on this article |
Abstract: In this paper, we present a probabilistic simulation technique to estimate the power consumption of a cmos circuit under a general delay model. This technique is based on the notion of tagged (probability) waveforms, which model the set of all possible events at the output of each circuit node. Tagged waveforms are obtained by partitioning the logic waveform space of a circuit node according to the initial and final values of each logic waveform and compacting all logic waveforms in each... (Update)
Similar documents based on text:
0.0: Unknown - (Correct)
BibTeX entry: (Update)
@misc{ estimation-revision,
author = "Gate-Level Power Estimation",
title = "Revision of Manuscript 42:",
url = "citeseer.ist.psu.edu/747236.html" }
Citations (may not include all citations):1726 Graph-based algorithms for Boolean function manipulation - Bryant - 1986
158 Estimation of average switching activity in combinational an.. - Ghosh, Devadas et al. - 1992
98 Transition density: A new measure of activity in digital cir.. - Najm - 1993
80 A Monte Carlo approach for power estimation - Burch, Najm et al. - 1993
60 Statistical estimation of the switching activity in digital .. - Xakellis, Najm - 1994
51 Probabilistic simulation for reliability analysis of cmos ci.. - Najm, Burch et al. - 1990
38 Efficient estimation of dynamic power dissipation under a re.. (context) - Tsui, Pedram et al. - 1993
29 Switching activity analysis considering spatiotemporal corre.. - Marculescu, Marculescu et al. - 1994
20 Improving the accuracy of circuit activity measurement (context) - Kapoor - 1994
18 Logic level power estimation considering spatiotemporal corr.. - Marculescu, Marculescu et al. - 1994
16 Power estimation in sequential logic circuits - Tsui, Monteiro et al. - 1995
15 Decomposition of boolean functions for low power based on a .. (context) - Schneider, Schlichtmann - 1994
14 Estimate of signal probability in combinational logic networ.. (context) - Ercolani, Favalli et al. - 1989
12 Low-pass filter for computing the transition density in digi.. - Najm - 1994
8 Estimation of switching activity in sequential logic circuit.. (context) - Monteiro, Devadas et al. - 1994
[Article contains additional citations not shown here]
Documents on the same site (http://atrak.usc.edu/~massoud/publications_nocgi.html): More
BEAR-FP: A Robust Framework for Floorplanning - Pedram, Kuh (1992) (Correct)
Estimation of Peak Power Dissipation in VLSI Circuits Using.. - Wu, Qiu, Pedram (Correct)
Capacitive Coupling Noise in High-Speed VLSI Circuits - Heydari, Pedram (Correct)
Online articles have much greater impact More about CiteSeer.IST Add search form to your site Submit documents Feedback
CiteSeer.IST - Copyright Penn State and NEC