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Latency Tolerant Architectures (1998)  (Make Corrections)  (2 citations)
James Edward Bennett



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Abstract: Tolerating memory latency is a topic that is almost as old as computer architecture itself. As soon as computer designers figured out how to make the processor run faster than the memory, dealing with memory latency became an issue. The IBM 360 model 91, for example, introduced the idea of using dynamic scheduling to tolerate memory latency in 1967. (Update)

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J.E. Bennett, "Latency Tolerant Architectures, " PhD thesis, Computer Science Dept., Stanford University, 1998. http://citeseer.ist.psu.edu/bennett98latency.html   More

@misc{ bennett98latency,
  author = "J. Bennett",
  title = "Latency Tolerant Architectures",
  text = "J.E. Bennett, Latency Tolerant Architectures,  PhD thesis, Computer Science
    Dept., Stanford University, 1998.",
  year = "1998",
  url = "citeseer.ist.psu.edu/bennett98latency.html" }
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