See this document in CiteSeerX!

Uniprocessor SMC Performance on Vectors with Non-Unit Strides  (Make Corrections)  
Computer Science Report No. CS-93-67 January 31, 1994 This work was supported ...



  Home/Search   Context   Related

 
View or download:
virginia.edu/~techrep/CS9367.ps.Z
Cached:  PS.gz  PS  PDF   Image  Update  Help

From:  virginia.edu/pub/techrep...README (more)
(Enter author homepages)

Rate this article: (best)
  Comment on this article  
(Enter summary)

Abstract: Memory bandwidth is rapidly becoming the performance bottleneck in the application of high performance microprocessors to vector-like algorithms, including the "grand challenge " scientific problems. Access ordering is one technique that can help bridge the processor -memory performance gap. Our solution combines compile-time detection of memory access patterns with a memory subsystem that decouples the order of requests generated by the processor from that issued to the memory system. This... (Update)

Similar documents based on text:   More   All
0.8:   Uniprocessor SMC Performance on Vectors with Non-Unit Strides - McKee (1994)   (Correct)
0.2:   Dynamic Access Ordering: Bounds on Memory Bandwidth - McKee (1994)   (Correct)
0.2:   An Analytic Model of SMC Performance - McKee (1993)   (Correct)

BibTeX entry:   (Update)

@misc{ report-uniprocessor,
  author = "Computer Science Report",
  title = "Uniprocessor SMC Performance on Vectors with Non-Unit Strides",
  url = "citeseer.ist.psu.edu/623295.html" }
Citations (may not include all citations):
1575   Computer Architecture: A Quantitative Approach (context) - Hennessy, Patterson - 1990
180   Linpack User's Guide (context) - Dongarra - 1979
110   The Livermore Fortran Kernels: A Computer Test of the Numeri.. (context) - McMahon - 1986
98   A set of Level 3 Basic Linear Algebra Subprograms (context) - Dongarra, DuCroz et al. - 1990
38   The Organization and Use of Parallel Memories (context) - Budnik, Kuck - 1971
38   Digital Equipment Corporation (context) - Handbook - 1992
38   Pseudo-Randomly Interleaved Memory - Rau - 1991
33   Vector Access Performance in Parallel Memories Using a Skewe.. (context) - Harper, Jump - 1987
32   Intel Corporation (context) - XP, Book - 1991
23   High-speed DRAMs (context) - Quinnell - 1991
22   Access Ordering and Effective Memory Bandwidth - Moyer - 1993
19   Address Transformation to Increase Memory Performance (context) - Harper - 1989
16   Mountain View (context) - Overview, Inc - 1992
13   Experimental Implementation of Dynamic Access Ordering - McKee, Klenke et al. - 1994
12   Increasing Memory Bandwidth for Vector Computations - McKee, Moyer et al. - 1994

[Article contains additional citations not shown here]

Documents on the same site (ftp://ftp.cs.virginia.edu/pub/techreports/README.html):   More
Fixed-Priority Scheduling of Periodic Tasks on Multiprocessor.. - Oh, Son (1995)   (Correct)
Mentat User's Manual - Grimshaw, Jr., Smoot, Weissman (1991)   (Correct)
Uniform Antimatroid Closure Spaces - Pfaltz, Karro (1998)   (Correct)

Online articles have much greater impact   More about CiteSeer.IST   Add search form to your site   Submit documents   Feedback  

CiteSeer.IST - Copyright Penn State and NEC