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Abstract: A novel architecture for winner-take-all (WTA) and looser-take-all (LTA) circuits is proposed. As compared with other realisations, the LTA does not require input subtraction from a reference, which decreases accuracy and input dynamics. The architectures have been designed using the g m /I D methodology. As it will be shown, this method allows a rapid new dimensioning when specifications are modified. Both the WTA and the LTA can operate with low voltage supply, and show better speed... (Update)
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BibTeX entry: (Update)
@misc{ donckers-design,
author = "Nicolas Donckers and Carlos Dualibe and Michel Verleysen",
title = "Design of Complementary Low-Power CMOS Architectures for Looser-take-all
and Winner-take-all",
url = "citeseer.ist.psu.edu/donckers99design.html" }
Citations (may not include all citations):31 Winner-take-all networks of O(n) complexity (context) - Lazzaro, Ryckebush et al. - 1989
16 An Analytical MOS Transistor Model Valid in All Regions of O.. (context) - Enz, Krummenacher et al. - 1995
7 A High-precision VLSI Winner-take-all circuit for self-organ.. (context) - Choi, Sheu - 1993
4 An analog processor architecture for a neural network classi.. - Verleysen, Thissen et al. - 1994
3 Analog implementation of Kohonen Map with On-Chip Learning - Macq, Verleysen et al. - 1993
1 Architectures de circuits massivement parallles pour la clas.. (context) - Thissen - 1996
1 Neural Networks for Fast Arbitration and Switchnig Noise Reu.. (context) - Ghosh, Hukkoo et al. - 1991
1 Design of SOI CMOS Operational Amplifier for Applications up.. (context) - Eggermont, De Ceuster et al. - 1996
1 CMOS winner-take-all circuits : a detail comparaison (context) - Gnay, Sanchez-Simencio - 1997
1 Advances in Neural Information Processing System (context) - Wyatt
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