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Abstract: This report presents asynchronous design solutions to the problem of Priority Arbitration which is defined in the following form. A system consists of multiple, physically concurrent, processes with a shared resource. The discipline of resource allocation is a function of parameters of the active requests, which are assigned to the requests either statically or dynamically. This function can be defined in an (arbitrary) combinatorial way (contrary to conventional, `topological', mappings, such... (Update)
Context of citations to this paper: More
...or cause metastability. Design of modules using such signals is still an art often requiring manual analyses and analog simulation [21, 1, 3]. After such a module has been developed, its outputs can be viewed as inputs for the part of the design that uses a direct mapping...
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BibTeX entry: (Update)
A. Bystrov, D. J. Kinniment, and A. Yakovlev. Priority arbiters. In Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems, pages 128137. IEEE Computer Society Press, April 2000. http://citeseer.ist.psu.edu/bystrov99priority.html More
@inproceedings{ bystrov00priority,
author = "A. Bystrov and D. J. Kinniment and A. Yakovlev",
title = "Priority Arbiters",
booktitle = "Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems",
publisher = "IEEE Computer Society Press",
pages = "128--137",
year = "2000",
url = "citeseer.ist.psu.edu/bystrov99priority.html" }
Citations (may not include all citations):73 A theory of asynchronous circuits - Muller - 1959
9 Microcomputer buses and links (context) - Corso, Kirrmann et al. - 1986
6 A Low Latency Asynchronous Arbitration Circuit (context) - Yakovlev, Petrov et al. - 1994
5 Synchronisation and arbitration circuits in digital systems (context) - Kinniment, Woods - 1976
5 Microprocessor system design (context) - Clements - 1997
5 CMOS Design of the Tree Arbiter Element (context) - MB - 1996
3 Collected papers on asynchronous VLSI design (context) - Martin - 1990
2 Ordered Arbiters (context) - Bystrov, Yakovlev - 1999
1 chip buses enable block based ASIC/FPGA design (context) - Thorne - 1997
1 Designing arbiters using Petri nets (context) - Yakovlev - 1995
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