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Abstract: viii CHAPTER 1 INTRODUCTION 1 1.1 Shared Memory Multiprocessor 2 1.2 Architectures of Shared Memory Multiprocessors: UMA, NUMA and COMA 3 1.3 Multiprocessor Cache Coherence Problem 6 1.4 Motivation for This Dissertation 8 1.5 Contribution of This Dissertation 9 1.6 Outline of Dissertation 10 CHAPTER 2 RELATED WORK 12 2.1 Shared Memory Multiprocessors 12 2.2 Ring Based Multiprocessors 16 2.3 Comparison of Interconnection Networks 17 2.4 Cache Coherence Protocols for Ring Based Multiprocessors... (Update)
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BibTeX entry: (Update)
@misc{ oi-design,
author = "Hitoshi Oi",
title = "Design and Performance Evaluation of. . .",
url = "citeseer.ist.psu.edu/oi00design.html" }
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2 Utilization of Cache Area in On-Chip Multiprocessor - Oi, Ranganathan - 1999
2 A Comparative Study of Bidirectional Ring and Crossbar Inter.. - Oi, Ranganathan - 1998
1 Performance Analysis of a Data Diffusion Machine with High F.. (context) - Oi - 1995
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1 A Cache Coherence Protocol for the Bidirectional Ring Based .. - Oi, Ranganathan - 1999
1 A Simulation Study of Hardware-Oriented DSM Approaches (context) - Gruji'c, Tomasevi'c et al. - 1996
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