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Abstract: Machine Models for Parallel and Distributed Computing Abstract. Parallel machines are converging to a standard scalable architecture. A set of processors communicate through a network providing linear increases in bisection bandwidth, as the number of processors increase. Each processor also has a large local memory, providing linear increases in memory bandwidth. In addition, the support of uniform latencies removes the dependence of an algorithm on network locality to achieve good... (Update)
Context of citations to this paper: More
...to which the above framework is still useful in such circumstances. Both this and our earlier paper use the WPRAM computational model [5] which provides a two level address space. Each processor may access both a private memory and a global shared memory; the latter is...
...1: The shunt operation. 4 Implementation of the Skeleton The skeleton has been implemented in C on a simulator for the WPRAM [7], a scalable, distributed shared memory computational model, which aims to exploit the features of emerging MIMD machines. The WPRAM provides a...
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Parallel CSG, Skeletons and Performance Modelling - Deldari, Davy, Dew (1996) (Correct)
A Skeleton for Parallel CSG with a Performance Model - Deldari, Davy, Dew (1997) (Correct)
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BibTeX entry: (Update)
J. M. Nash, P. M. Dew, and M. E. Dyer. Scalable and portable computing using the WPRAM model. In M. Kara, J. Davy, D. Goodeve, and J. Nash, editors, Abstract Machine Models for Parallel and Distributed Computing, pages 47--62. IOS Press, April 1996. http://citeseer.ist.psu.edu/nash96scalable.html More
@article{ nash96scalable,
author = "Jonathan M. Nash and Peter M. Dew and Martin E. Dyer",
title = "A scalable shared queue on a distributed memory machine",
journal = "The Computer Journal",
volume = "39",
number = "6",
month = "????",
pages = "483--495",
year = "1996",
url = "citeseer.ist.psu.edu/nash96scalable.html" }
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