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Abstract: Decisions taken at the earliest steps of the design process may have a significant impact on the characteristics of the final implementation. This paper illustrates how power consumption issues can be tackled during high-level synthesis (high-level transformations, scheduling and binding). Several techniques pursuing low power are proposed and the potential benefits evaluated. The common idea behind these techniques is to reduce the activity of the functional units (e.g. adders, multipliers) by ... (Update)
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BibTeX entry: (Update)
E. Musoll and J. Cortadella, "High-Level Synthesis Techniques for Reducing the Activity of Functional Units," Proceedings of the International Symposium on Low-Power Design, April 1995, pp. 99-104. http://citeseer.ist.psu.edu/musoll95highlevel.html More
@misc{ musoll95highlevel,
author = "E. Musoll and J. Cortadella",
title = "High-Level Synthesis Techniques for Reducing the Activity of Functional
Units",
text = "E. Musoll and J. Cortadella, High-Level Synthesis Techniques for Reducing
the Activity of Functional Units, Proceedings of the International Symposium
on Low-Power Design, April 1995, pp. 99-104.",
year = "1995",
url = "citeseer.ist.psu.edu/musoll95highlevel.html" }
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