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Abstract: Hard real-time systems rely on the assumption that the deadlines of tasks can be met -- otherwise the safety of the controlled system is jeopardized. Several scheduling paradigms have been developed to support the analysis of a task sets and determine if a schedule is feasible. These scheduling paradigms rely on the assumption that the worst-case execution time (WCET) of hard real-time tasks be known a-priori. In the past years, research in the static prediction of WCET has been extended from... (Update)
Context of citations to this paper: More
...of the different execution paths within the program. Today s computer architectures with superscalar processors [11] and caches [8] make the prediction of execution times even more difficult, specially in the context of concurrent programs in which cache misses are...
...are allowed. Obtaining categorizations for set associative data cache organizations can be done in a manner similar to that described in [20]. Second, recursive calls are not allowed since it would complicate the generation of unique function instances. Third, indirect calls...
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8: Bounding worst-case instruction cache performance (context) - Arnold, Mueller et al. - 1994
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8: Cache modeling for real-time software: Beyond direct mapped instruction caches (context) - Li, Malik et al. - 1996
BibTeX entry: (Update)
F. Mueller. Generalizing timing predictions to setassociative caches. TR 96-66, Inst. f. Informatik, Humbolt University Berlin, July 1996. http://citeseer.ist.psu.edu/mueller96generalizing.html More
@misc{ mueller96generalizing,
author = "F. Mueller",
title = "Generalizing timing predictions to setassociative caches",
text = "F. Mueller. Generalizing timing predictions to setassociative caches. TR
96-66, Inst. f. Informatik, Humbolt University Berlin, July 1996.",
year = "1996",
url = "citeseer.ist.psu.edu/mueller96generalizing.html" }
Citations (may not include all citations):1582 Scheduling algorithms for multiprogramming in a hard-real-ti.. - Liu, Layland - 1973 ACM DBLP
1575 Computer Architecture: A Quantitative Approach (context) - Hennessy, Patterson - 1996 ACM
1399 Compilers -- Principles (context) - Aho, Sethi et al. - 1986
167 Calculating the maximum execution time of real-time programs (context) - Puschner, Koza - 1989 DBLP
91 An accurate worst case timing analysis for RISC processors - Lim, Bea et al. - 1994 ACM DBLP
85 Predicting program execution times by analyzing static and d.. (context) - Park - 1993 ACM DBLP
83 Bounding worst-case instruction cache performance (context) - Arnold, Mueller et al. - 1994 DBLP
83 A retargetable technique for predicting execution time - Harmon, Baker et al. - 1992 DBLP
55 Pipelined processors and worst case execution times - Zhang, Burns et al. - 1993 ACM DBLP
46 Efficient microarchitecture modeling and path analysis for r.. - Li, Malik et al. - 1995 ACM DBLP
42 strategic memory allocation for real-time) cache design (context) - Kirk - 1989
35 Software-based cache partitioning for real-time applications (context) - Wolfe - 1993 ACM
28 Computing maximum task execution times -- a graph-based appr.. - Puschner - 1997
24 Static Cache Simulation and its Applications - Mueller - 1994 ACM
23 Compiler support for software-based cache partitioning - Mueller - 1995 ACM DBLP
15 Worst case timing analysis of RISC processors: R3000/R3010 c.. - Hur, Bea et al. - 1995 DBLP
10 Zeitanalyse von Echtzeitprogrammen (context) - Puschner - 1993
9 Adding instruction cache effect to an exact schedulability a.. (context) - Busquets-Matraix - 1996
6 Bounding worst-case data cache performance - White, Whalley et al. - 1996 ACM
5 CPU info center (context) - CS - 1996
4 The impact of extrinsic cache performance on predictability .. (context) - Busquets-Matraix - 1995 ACM
3 Worst-case timing analysis of instruction caches with wrapar.. (context) - Healy, Whalley et al. - 1996
3 Integrating the timing analysis of pipelining and caching (context) - Healy, Whalley et al. - 1995
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