(Enter summary)
Abstract: It has been claimed that the execution time of a program
can often be predicted more accurately on an
uncached system than on a system with cache memory
[5, 20]. Thus, caches are often disabled for critical
real-time tasks to ensure the predictability required
for scheduling analysis. This work shows that
instruction caching can be exploited to gain execution
speed without sacrificing predictability. A new method
called Static Cache Simulation is introduced which uses
control-flow information... (Update)
Context of citations to this paper: More
.... a hit or a miss, but all non first executions will result in hits (This is similar to the first miss classification as found in [19]. An abstract cache state c at a control flow node k that references a memory block s x is interpreted in the following way: If s x 2 c(l...
.... compose these paths for loops, functions, and, ultimately, the entire application, to derive cycle counts that bound the WCET [1,2,11,23,24,25,26,27,38,39,40]. Figure 1 shows the organization of the timing analysis environment, which has been adapted to model the VISA and the...
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BibTeX entry: (Update)
F. Mueller, D. Whalley, and M. Harmon. Predicting instruction cache behavior. Unpublished Technical Report, 1993. http://citeseer.ist.psu.edu/mueller93predicting.html More
@misc{ mueller93predicting,
author = "F. Mueller and D. Whalley and M. Harmon",
title = "Predicting instruction cache behavior",
text = "F. Mueller, D. Whalley, and M. Harmon. Predicting instruction cache behavior.
Unpublished Technical Report, 1993.",
year = "1993",
url = "citeseer.ist.psu.edu/mueller93predicting.html" }
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