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Abstract: The large latency of memory accesses is a major obstacle in obtaining high processor utilization in large scale shared-memory multiprocessors. Although the provision of coherent caches in many recent machines has alleviated the problem somewhat, cache misses still occur frequently enough that they significantly lower performance. In this paper we evaluate the effectiveness of non-binding software-controlled lyrefetching, as proposed in the Stanford DASH Multiprocessor, to address this problem.... (Update)
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BibTeX entry: (Update)
Todd Mowry and Anoop Gupta. Tolerating latency through software-controlled prefetching in shared-memory multiprocessors. Journal of Parallel and Distributed Computing, 12:87--106, June 1991. http://citeseer.ist.psu.edu/mowry91tolerating.html More
@article{ mowry91tolerating,
author = "T. Mowry and A. Gupta",
title = "Tolerating Latency Through Software-Controlled Prefetching in Shared-Memory Multiprocessors",
journal = "Journal of Parallel and Distributed Computing",
volume = "12",
number = "2",
publisher = "Academic Press",
address = "San Diego, New York, Boston, London, Syndey, Tokyo, Toronto",
pages = "87--106",
year = "1991",
url = "citeseer.ist.psu.edu/mowry91tolerating.html" }
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