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Abstract: Both hardware-controlled and compiler-directed mechanisms have been proposed for maintaining cache coherence in largescale shared-memory multiprocessors, but both of these approaches have significant limitations. We examine the potential performance improvement of a new software-hardware controlled cache coherence mechanism [18]. This approach augments the run-time information available to a directorybased coherence mechanism with compile-time analysis that statically identifies write... (Update)
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BibTeX entry: (Update)
@inproceedings{ mounestoussi94evaluation,
author = "Farnaz Mounes-Toussi and David J. Lilja and Zhiyuan Li",
title = "An evaluation of a compiler optimization for improving the performance of a coherence directory",
booktitle = "International Conference on Supercomputing",
pages = "75-84",
year = "1994",
url = "citeseer.ist.psu.edu/mounes-toussi94evaluation.html" }
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