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A Formal Model of Asynchronous Communication and Its Use in Mechanically Verifying a Biphase Mark Protocol (1992)  (Make Corrections)  (19 citations)
J. Strother Moore
Formal Aspects of Computing



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Abstract: In this paper we present a formal model of asynchronous communication as a function in the Boyer-Moore logic. The function transforms the signal stream generated by one processor into the signal stream consumed by an independently clocked processor. This transformation "blurs" edges and "dilates" time due to differences in the phases and rates of the two clocks and the communications delay. The model can be used quantitatively to derive concrete performance bounds on asynchronous communications ... (Update)

Context of citations to this paper:   More

...0. Physically, due to some disturbance, it takes some amount of time to the signal on the bus to change from high to low or vice versa [23, 24]. So the value of r is chosen arbitrarily among 0 and 1 if the digitised value is neither 0 nor 1. Therefore r is unreliable when the...

.... To our knowledge, there has been some work on the veri cation of instances of the protocol either using theorem proving techniques [Moo93] or model checking [IG99,Vaa] and one work presenting full parameter analysis using PVS and the Duration Calculus, however, without...

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Verification of a Biphase Mark Protocol - Ivanov, Griffioen (1999)   (Correct)
Some Lessons from the HyTech Experience - Henzinger, Preußig, Wong-Toi (2001)   (Correct)
Real-Time Systems Development with Duration Calculi: an Overview - Van Hung (2002)   (Correct)

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BibTeX entry:   (Update)

J Strother Moore, "A formal model of asynchronous communication and its use in mechanically verifying a biphase mark protocol", NASA CR-4433, June 1992. http://citeseer.ist.psu.edu/moore92formal.html   More

@article{ moore94formal,
    author = "J Strother Moore",
    title = "A Formal Model of Asynchronous Communication and its Use in Mechanically Verifying a Biphase Mark Protocol",
    journal = "Formal Aspects of Computing",
    volume = "6",
    number = "1",
    pages = "60--91",
    year = "1994",
    url = "citeseer.ist.psu.edu/moore92formal.html" }
Citations (may not include all citations):
2732   Communicating Sequential Processes (context) - Hoare - 1985  ACM   DBLP
1097   Automatic Verification of Finite-State Concurrent Systems us.. (context) - Clarke, Emerson et al. - 1986  ACM   DBLP
716   Parallel Program Design: A Foundation (context) - Chandy, Misra - 1988  ACM
484   A Calculus of Communicating Systems (context) - Milner - 1980
413   Petri Net Theory and the Modeling of Systems (context) - Peterson - 1981  ACM
392   A Computational Logic (context) - Boyer, Moore - 1979
334   A Computational Logic Handbook (context) - Boyer, Moore - 1988  ACM
256   Reaching Agreement in the Presence of Faults (context) - Pease, Shostak et al. - 1980  ACM   DBLP
221   Introduction to VLSI Systems (context) - Mead, Conway - 1980  ACM
33   Adequate Proof Principles for Invariance and Liveness Proper.. (context) - Manna, Pnueli - 1984  ACM   DBLP
31   Multi-Level Verification of Microprocessor-Based Systems (context) - Joyce - 1990
25   Digital Communications Fundamentals and Applications (context) - Sklar - 1988
24   Research on Automatic Verification of Finite-State Concurren.. (context) - Clarke, Grumberg - 1987
19   Formal Verification of Hardware Design (context) - Yoeli - 1990  ACM
19   Special Issue on System Verification (context) - Bevier, Hunt et al. - 1989
14   The Proof of Correctness of a Fault-Tolerant Circuit Design - Bevier, Young - 1991
14   Formal Verification of the Interactive Convergence Clock Syn.. - Rushby, von Henke - 1989
13   Mechanizing Unity (context) - Goldschlag - 1990
9   Webster's Ninth New Collegiate Dictionary (context) - Mish - 1987
9   Mechanically Verified Hardware Implementing an 8-Bit Paralle.. - Moore - 1992  ACM
7   Digital Communication Systems Design (context) - Roden - 1988  ACM
7   A Survey of Verification Techniques for Parallel Programs (context) - Barringer - 1985  ACM
5   Also available through Computational Logic (context) - Hunt, Microprocessor et al. - 1985
4   Formal Techniques for Protocol Specification and Verificatio.. (context) - Sunshine - 1979
4   Formal Proof of Correspondence Between the Specification of .. (context) - Pygott - 1985
4   Formal Specification and Verification of Asynchronous Proces.. (context) - Joyce - 1988  ACM   DBLP
4   Programmer's Guide to Serial Communications (context) - Campbell - 1988
4   A Formal Introduction to a Simple HDL (context) - Brock, Hunt - 1990
4   Intel Literature Sales (context) - Corporation - 1991
3   A Mechanical Verification of the Alternating Bit Protocol - DiVito - 1981  ACM
3   Elsevier Science Publishers B (context) - Aggarwal, Sabnani et al. - 1988
2   Specification Real-Time Protocols for Broadcast Networks (context) - Jain, Lam - 1991
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A Formalization of a Subset of VHDL - Russinoff (1994)   (Correct)
A Mathematical Model of the Mach Kernel - Bevier, Smith (1994)   (Correct)
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