(Enter summary)
Abstract: This paper describes a methodology for developing processor
specific tools such as assemblers, disassemblers,
processor simulators, compilers etc., using processor models
in a generic way. The processor models are written in a
language called Sim-nML [1] which is powerful enough to
capture the instruction set architecture of a processor.
We describe a few tools in this paper which can be retargeted
to any processor using the high level Sim-nML model
of the processor.
1. (Update)
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BibTeX entry: (Update)
Rajat Moona. Processor Models for Retargetable Tools. In Proc. of 11th IEEE Int. Workshop on Rapid Systems Prototyping (RSP 2000. http://citeseer.ist.psu.edu/moona00processor.html More
@inproceedings{ moona00processor,
author = "Rajat Moona",
title = "Processor Models for Retargetable Tools",
booktitle = "{IEEE} International Workshop on Rapid System Prototyping",
pages = "34-39",
year = "2000",
url = "citeseer.ist.psu.edu/moona00processor.html" }
Citations (may not include all citations):
1575
Computer Architecture: A Quantitative Approach (context) - Hannessy, Patterson - 1996
98
HPL PlayDoh Architecture Specifications: Version (context) - Kathail, Schlansker et al. - 1994
89
Using the SimOS Machine Simulator to Study Complex Computer ..
- Rosenblum, Bugnion et al. - 1997
66
ISDL: An Instruction Set Description Language for Retargetab..
- Hadjiyiannis, Hanono et al. - 1997
36
PowerPC 603 RISC Microprocessor User's Manual (context) - Microelectronics - 1995
17
ACM transactions on Programming Languages and Systems (context) - Raksey, Specifying et al. - 1997
9
The nML Machine Description Formalism (context) - Freerick - 1993
6
A Generic Approach to Performance Modeling and its Applicati.. (context) - Rajesh
6
Disassembler using high level processor models
- Jain
5
ADSP-2101/2 User's Manual (context) - Inc - 1988
4
Retargetable Functional Simulator Using High Level Processor.. (context) - Chandra, Moona
4
Retargetable functional simulator
- Chandra
3
MHC Reference Manual (context) - HC, http et al. - 1994
3
Advanced RISC Machines Architecture Reference Manual (context) - Jaggar - 1996
2
Portable formats specifications (context) - Linkable, ELF et al.
1
Retargetable Profiling Tools and their Application in Cache ..
- Rajiv - 1999
1
New Age International Publication (context) - Gaonkar, Microprocessor - 1995
1
The SPARC Architecture Manual v (context) - Weaver, Germond - 1994
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