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A Dual Voltage-Frequency VLSI Chip for Image Watermarking in DCT Domain (2006)  (Make Corrections)  
Saraju P. Mohanty, Nagarajan Ranganathan, Karthikeyan Balakrishnan



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Abstract: In this paper, we present a new VLSI architecture that can insert invisible or visible watermarks in images in the DCT domain. Several low power design techniques such as dual voltages, dual frequency and clock gating have been incorporated in the architecture to reduce the power consumption. The supply voltage levels and the operating frequencies are chosen such that there is a throughput and bandwidth match between low and high operating frequency modules. The proposed architecture exploits... (Update)

Active bibliography (related documents):   More   All
1.5:   Design of a Low Power Image Watermarking Encoder.. - Mohanty.. (2005)   (Correct)
1.4:   Energy and Transient Power Minimization during Behavioral Synthesis - Mohanty (2003)   (Correct)
0.6:   A VLSI Architecture for Visible Watermarking in a.. - Mohanty.. (2005)   (Correct)

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BibTeX entry:   (Update)

@misc{ mohanty-dual,
  author = "Saraju P. Mohanty and Nagarajan Ranganathan and Karthikeyan Balakrishnan",
  title = "A Dual Voltage-Frequency VLSI Chip for Image Watermarking in DCT Domain",
  url = "citeseer.ist.psu.edu/mohanty06dual.html" }
Citations (may not include all citations):
297   Secure Spread Spectrum Watermarking for Multimedia - Cox, Kilian et al. - 1997
159   Principles of CMOS VLSI Design : A Systems Perspective (context) - Weste, Eshraghian - 1999
41   The Designer's Guide to VHDL (context) - Ashenden - 1995
16   Effective and Ineffective Digital Watermarks - Mintzer, Braudaway et al. - 1997
14   An Automated Temporal Partitioning and Loop Fission approach.. - Kaul, Vemuri et al. - 1999
9   Hardware Implementation Perspectives of Digital Video Waterm.. - Mathai, Kundur et al. - 2003
9   Implementation of a Real-Time Digital Watermarking Process f.. (context) - Strycker - 2000
9   Pushing ASIC Performance in a Power Envelope - Puri - 2003
7   A Systems Level Design for Embedded Watermark Technique usin.. (context) - Tsai, Lu - 2001
7   VLSI Impementation of Online Digital Watermarking Techniques.. (context) - Garimella - 2003
6   An Effective Design Systems for Dynamically Reconfigurable A.. - Govindarajan, Ouaiss et al. - 1998
6   A DCT Domain Visible Watermarking Technique for Images - Mohanty, Ramakrishnan et al. - 2000
2   Assembly Language Introduction to Computer Architecture: Usi.. (context) - Miller - 1999
2   Digial Logic Analysis and Design (context) - Nelson, Nagle et al. - 1995
1   Digital Watermarking of Images (context) - Mohanty - 1999
1   Developing Standard Cells for TSMC 0.25m Technology under MO.. (context) - Sulistyo, Ha - 2002
1   A VLSI Architecture for Visible Watermarking in a Secure Sti.. - Mohanty, Ranganathan et al.

Documents on the same site (http://www.cs.unt.edu/~smohanty/research/ListOfPublications2006.html):
ILP Models for Simultaneous Energy and Transient Power.. - Saraju Mohanty.. (2006)   (Correct)

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