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Abstract: As field programmable gate array (FPGA) technology has steadily improved, FPGAs have become viable alternatives to other technology implementations for high-speed classes of digital signal processing (DSP) applications. In particular, radar front-end signal processing, an application formerly dominated by custom very large scale integration (VLSI) chips, may now be a prime candidate for migration to FPGA technology. As this thesis demonstrates, current FPGA devices have the power and capacity... (Update)
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BibTeX entry: (Update)
@inproceedings{ moeller99field,
author = "Tyler J. Moeller and David R. Martinez",
title = "Field Programmable Gate Array Based Radar Front-End Digital Signal Processing",
booktitle = "{IEEE} Symposium on {FPGA}s for Custom Computing Machines",
publisher = "{IEEE} Computer Society Press",
address = "Los Alamitos, CA",
editor = "Kenneth L. Pocek and Jeffrey Arnold",
pages = "178--187",
year = "1999",
url = "citeseer.ist.psu.edu/moeller99field.html" }
Citations (may not include all citations):56 Splash 2: FPGAs in a Custom Computing Machine (context) - Buell, Arnold et al. - 1996
54 Discrete-Time Signal Processing (context) - Oppenheim, Schafer - 1989
44 Space-time adaptive processing for airborne radar (context) - Ward - 1994
37 The roles of FPGAs in reprogrammable systems - Hauck - 1998
22 An assessment of the suitability of FPGA-based systems for u.. - Petersen, Hutchings - 1995
18 Applications of distributed arithmetic to digital signal pro.. (context) - White - 1989
12 The flexibility of configurable computing (context) - Villasenor, Hutchings - 1998
9 Virtex 2.5 V field programmable gate arrays (context) - Publications - 1998
9 Using Xilinx FPGAs to design custom digital signal processin.. (context) - Goslin
6 Personal Communication (context) - Greco - 1996
4 Effects of finite register length in digital filtering and t.. (context) - Oppenheim, Weinstein
4 Using programmable logic to accelerate DSP functions - Knapp - 1995
3 Introduction to Airborne Radar (context) - Stimson - 1998
3 Efficient parallel FIR filter implementations using frequenc.. - Chung, Kim et al. - 1998
3 Reconfigurable logic: hardware speed with software flexibili.. (context) - Conner - 1996
3 Low-area/power parallel FIR digital filter implementation (context) - Parker, Parhi - 1997
3 A pipeline fast Fourier transform (context) - Groginsky, Works
3 Implement DSP functions in FPGAs to reduce cost and boost pe.. (context) - Goslin - 1996
2 A coarsegrained FPGA architecture for high-performance FIR f.. (context) - Anderson, Sheth et al.
2 Detailed model shows FPGAs' true costs (context) - Liu - 1995
2 A distributed arithmetic approach to designing scalable DSP .. (context) - New - 1995
2 STARFIRE Reference Manual (context) - Systems - 1999
1 VLSI bit-level systolic array for radar front-end signal pro.. (context) - Song
1 Efficient bit-level systolic array implementation of FIR and.. (context) - Wang, Wei et al. - 1988
1 Field programmable gate array based radar front-end digital .. (context) - Moeller, Martinez - 1999
1 FPGAs and DSP (context) - Publications
1 Digital Filters and the Fast Fourier Transform (context) - Liu - 1975
1 The role of distributed arithmetic in FPGAbased signal proce.. (context) - Publications
1 Xilinx breaks one million-gate barrier with delivery of new .. (context) - Publications - 1998
1 Application of reconfigurable computing to a high performanc.. (context) - Martinez, Moeller et al. - 2000
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