Scott A. Mahlke, William Y. Chen, John C. Gyllenhaal, Wen-mei W. Hwu  Home/Search
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Abstract: Exploiting parallelism at both the multiprocessor level and the instruction level is an effective means for supercomputers to achieve high-performance. The amount of instruction-level parallelism available to superscalar or VLIW node processors can be limited, however, with conventional compiler optimization techniques. In this paper, a set of compiler transformations designed to increase instruction-level parallelism is described. The effectiveness of these transformations is evaluated using... (Update)
Context of citations to this paper: More
.... with other code optimizations, can increase instruction level parallelism and improve memory hierarchy locality [Alex93, Baco94, Davi94, Davi96, Mahl92], as described in chapter four and chapter five. A detailed example of loop unrolling has already been presented in...
...by the compiler and discusses the effect of loop unrolling on instruction size buffer and register pressure within the loop. Mahlke [19] studies optimizations which can increase instruction level parallelism for supercomputer. Loop unrolling is one of them. By analyzing...
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BibTeX entry: (Update)
S. A. Mahlke, W. Y. Chen, J. C. Gyllenhaal, W. W. Hwu, P. P. Chang, and T. Kiyohara, "Compiler Code Transformations for Superscalar-Based High-Performance Systems," in Proceedings of Supercomputing `92, Nov. 1992. http://citeseer.ist.psu.edu/mahlke92compiler.html More
@inproceedings{ mahlke92compiler,
author = "Scott A. Mahlke and William Y. Chen and John C. Gyllenhaal and Wen-mei W. Hwu and Pohua P. Chang and Tokuzo Kiyohara",
title = "Compiler Code Transformations for Superscalar-Based High-Performance Systems",
booktitle = "Proceedings Supercomputing '92",
publisher = "IEEE",
address = "Minn., MN",
pages = "808--817",
year = "1992",
url = "citeseer.ist.psu.edu/mahlke92compiler.html" }
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