(Enter summary)
Abstract: :
We describe novel techniques used for efficient simulation of memory in SIMICS, an
instruction level simulator developed at SICS. The design has focused on efficiently
supporting the simulation of multiprocessors, analyzing complex memory hierarchies and
running large binaries with a mixture of system-level and user-level code.
A software caching mechanism (the Simulator Translation Cache, STC) improves the
performance of interpreted memory operations by reducing the number of calls to... (Update)
Context of citations to this paper: More
...these tool were not available when the system was implemented. In the last phase of the project the instruction level simulator SimICS [43, 42, 44] was used. The simulator accurately simulates a multiprocessor SPARC architecture and can provide valuable statistics. The simulator...
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BibTeX entry: (Update)
P. Magnusson and B. Werner. Some efficient techniques for simulating memory. Technical Report T94:16, Swedish Institute of Computer Science, August 1994. http://citeseer.ist.psu.edu/magnusson94some.html More
@techreport{ magnusson94some,
author = "Peter S. Magnusson and Bengt Werner",
title = "Some Efficient Techniques for Simulating Memory",
number = "R94-16",
month = "1,",
year = "1994",
url = "citeseer.ist.psu.edu/magnusson94some.html" }
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