(Enter summary)
Abstract: Several system-on-chip (SoC) platforms have recently
emerged that use reconfigurable logic (FPGAs) as a programmable
co-processor to reduce the computational load
on the main processor core. In this paper, we present an interface
synthesis approach that forms part of our hardwaresoftware
co-design methodology for such an FPGA-based
platform. The approach is based on a novel memory mapping
algorithm that maps data used by both the hardware
and the software to shared memories on the... (Update)
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BibTeX entry: (Update)
M. Luthra, et al. Interface synthesis using memory mapping for an FPGA platform. ICCD, 2003. http://citeseer.ist.psu.edu/luthra03interface.html More
@misc{ luthra03interface,
author = "M. Luthra",
title = "Interface synthesis using memory mapping for an FPGA platform",
text = "M. Luthra, et al. Interface synthesis using memory mapping for an FPGA
platform. ICCD, 2003.",
year = "2003",
url = "citeseer.ist.psu.edu/luthra03interface.html" }
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