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Converting Thread-Level Parallelism to Instruction-Level Parallelism via Simultaneous Multithreading (1997)  (Make Corrections)  (52 citations)
Jack L. Lo, Susan J. Eggers, Joel S. Emer, Henry M. Levy, Rebecca L. Stamm
ACM Transactions on Computer Systems



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Abstract: This article explores parallel processing on an alternative architecture, simultaneous multithreading (SMT), which allows multiple threads to compete for and share all of the processor's resources every cycle. The most compelling reason for running parallel applications on an SMT processor is its ability to use thread-level parallelism and instruction-level parallelism interchangeably. By permitting This research was supported by Digital Equipment Corporation, the Washington Technology Center,... (Update)

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BibTeX entry:   (Update)

J. L. Lo, S. J. Eggers, J. S. Emer, H. M. Levy, R. L. Stamm, and D. M. Tullsen. Converting thread-level parallelism to instruction-level parallelism via simultaneous multithreading. ACM Transactions on Computer and Systems, 15(3):322--354, August 1997. http://citeseer.ist.psu.edu/lo97converting.html   More

@article{ lo97converting,
    author = "Jack L. Lo and Joel S. Emer and Henry M. Levy and Rebecca L. Stamm and Dean M. Tullsen",
    title = "Converting Thread-Level Parallelism to Instruction-Level Parallelism via Simultaneous Multithreading",
    journal = "ACM Transactions on Computer Systems",
    volume = "15",
    number = "3",
    pages = "322--354",
    year = "1997",
    url = "citeseer.ist.psu.edu/lo97converting.html" }
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