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  Comparing Static and Dynamic Scheduling on Superscalar Processors

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by Jack Lo
http://www.cs.washington.edu/homes/jlo/papers/generals.ps
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Abstract:

In order to effectively exploit the hardware parallelism offered by modern superscalar processors, efficient code schedules must be generated that maximize the use of available machine resources. In the late 1960s, hardware techniques were proposed in the IBM 360/91[Tom67] and CDC 6600[Tho70] machines to perform this

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