Yue Liu, Mona Dimitri, David R. Kaeli  Home/Search
Context Related
| neu.edu/info/archi...NUCAR_7_97_2.ps.gz neu.edu/info/architecture/r...JSA.ps.gz Cached: PS.gz PS PDF This document uses CoBlitz to cache paper downloads. If your firewall is blocking outgoing connections to port 3125, you can use these links to download local copies.
Image Update HelpPS.gz PS PDF From: neu.edu/info/archi...publications (more) From: neu.edu/info/architectur...topic7 (Enter author homepages) |
Rate this article:      (best)Comment on this article |
Abstract: The design of the on-chip cache memory and branch prediction logic has become an integral part of a microprocessor implementation. Branch predictors reduce the effects of control hazards on pipeline performance. Branch prediction implementations have been proposed which eliminate a majority of the pipeline stalls associated with branches. Caches are commonly used to reduce the performance gap between microprocessor and memory technology. Caches can only provide this benefit if the requested... (Update)
Context of citations to this paper: More
...the two methods essentially provides a cache hit rate of up to 96.6 . 3.2. 2 Branch directed and Pointer based data cache prefetching[2] This paper is a follow on to Branch directed and Stride based data cache prefetching by Kaeli and Liu. In this paper, Pointer based...
Cited by: More
Hardware Based Prefetching Methods - Ebenezer (1998) (Correct)
Active bibliography (related documents): More All
0.5: Techniques Utilizing Memory Reference Characteristics for Improved .. - Wong (Correct)
0.5: Using Reconfigurable Hardware to Customize Memory Hierarchies - Zhong, Martonosi (1996) (Correct)
0.5: Understanding the Memory Behavior Performance on Software.. - Poulos (Correct)
Similar documents based on text: More All
0.4: Conflict Miss Elimination by Time-stride Prefetch - Tang, Veidenbaum, Nicolau.. (2000) (Correct)
0.3: Cache Prefetching - Berg (2002) (Correct)
0.3: "prefetching For Reducing Cache Misses" - Prepared By Ayse (Correct)
BibTeX entry: (Update)
M. Dimitri, Y. Liu and D. Kaeli. Branch directed and Pointer-based data cache prefetching. Journal of Systems Architecture, to appear in the special issue on Microprocessor architectures, January 1999. http://citeseer.ist.psu.edu/liu99branchdirected.html More
@misc{ dimitri99branch,
author = "M. Dimitri and Y. Liu and D. Kaeli",
title = "Branch directed and Pointer-based data cache prefetching",
text = "M. Dimitri, Y. Liu and D. Kaeli. Branch directed and Pointer-based data
cache prefetching. Journal of Systems Architecture, to appear in the special
issue on Microprocessor architectures, January 1999.",
year = "1999",
url = "citeseer.ist.psu.edu/liu99branchdirected.html" }
Citations (may not include all citations):443 Improving Direct-Mapped Cache Performance by the Addition of.. - Jouppi - 1990
249 Tolerating Latency Through Software-Controlled Data Prefetch.. - Mowry - 1994
241 A Study of Branch Prediction Strategies (context) - Smith - 1981
147 Alternative Implementations of Two-level Adaptive Branch Pre.. - Yeh, Patt - 1992
146 A Comparison of Dynamic Branch Predictors That Use Two Level.. - Yeh, Patt - 1993
121 An Architecture for Software-Controlled Data Prefetching (context) - Klaiber, Levy - 1991
109 Comparative Evaluation of Latency Reducing and Tolerating Te.. - Gupta, Hennessy et al. - 1991
104 Compiler-Based Prefetching for Recursive Data Structures - Luk, Mowry - 1996
104 Prefetching using Markov Predictors - Joseph, Grunwald - 1997
94 Stride Directed Prefetching in Scalar Processors (context) - Fu, Patel - 1992
93 Aspects of Cache Memory and Instruction Buffer Performance (context) - Hill - 1987
90 Reducing Memory Latency via Non-blocking and Prefetching Cac.. - Chen, Baer - 1992
65 A Case for Two-Way Skewed-Associative Caches - Seznec - 1996
62 A Comparative Analysis of Schemes for Correlated Branch Pred.. - Young, Gloy et al. - 1995
59 Branch History Table Prediction of Moving Target Branches Du.. (context) - Kaeli, Emma - 1991
47 Efficient Procedure Mapping using Cache Line Coloring - Hashemi, Kaeli et al. - 1997
41 SPAID: Software Prefetching in Pointer and Call-Intensive En.. - Lipatsi, Schmidt et al. - 1995
37 Skewed Associative Caches (context) - Seznec - 1993
35 An Analysis of Dynamic Branch Prediction Schemes on System W.. - Gloy, Young et al. - 1996
25 Data Prefetching for High-Performance Processors - Chen - 1993
23 Properties of the Working-Set Model (context) - Denning, Schwartz - 1972
21 Generalized Correlation Based Hardware Prefetching (context) - Charney, Reeves - 1995
10 Multiple Branch and Block Prediction - Wallace, Bagherzadeh - 1997
10 Data Prefetch Mechanisms for Accelerating Symbolic and Numer.. - Mehrotra - 1996
7 Buffer Block Prefetching Method (context) - Gindele - 1977
4 Digital Equipment Corporation (context) - Manual - 1994
2 Value Locality and Load Value Prediction (context) - Lipatsi, Wilkerson et al. - 1996
2 Branch-Directed Data Cache Prefetching (context) - Chang, Kaeli et al. - 1994
1 Using a BTB to Guide Data Cache Prefetching (context) - Liu, Kaeli - 1996
1 Cache Memory (context) - Smith - 1982
1 Modeling Cache Pollution (context) - Casmira, Kaeli - 1995
1 special issue on performance tools (context) - Kaeli, Fong et al. - 1997
Documents on the same site (http://www.ece.neu.edu/info/architecture/publications.html): More
Predicting Indirect Branches via Data Compression - Kalamatianos, al. (1998) (Correct)
Procedure Mapping Using Static Call Graph Estimation - Hashemi, Kaeli, Calder (1997) (Correct)
Temporal-based Procedure Reordering for Improved.. - Kalamatianos, Kaeli (1998) (Correct)
Online articles have much greater impact More about CiteSeer.IST Add search form to your site Submit documents Feedback
CiteSeer.IST - Copyright Penn State and NEC