Mikko H. Lipasti, et al.  Home/Search
Context Related
| davinci.snu.ac.kr/li...lipasti96a.ps.gz cardit.et.tudelft.nl...lipasti96a.ps.gz prism.uvsq.fr/arch...e_prediciton.ps.gz Cached: PS.gz PS PDF This document uses CoBlitz to cache paper downloads. If your firewall is blocking outgoing connections to port 3125, you can use these links to download local copies.
Image Update HelpPS.gz PS PDF From: davinci.snu.ac.kr/links/ilp/ (more) From: prism.uvsq.fr/archi/p...asplosVII (Enter author homepages) |
Rate this article:      (best)Comment on this article |
Abstract: Since the introduction of virtual memory demand-paging and cache memories, computer systems have been exploiting spatial and temporal locality to reduce the average latency of a memory reference. In this paper, we introduce the notion of value locality, a third facet of locality that is frequently present in real-world programs, and describe how to effectively capture and exploit it in order to perform load value prediction. Temporal and spatial locality are attributes of storage locations,... (Update)
Cited by: More
On the Performance Potential of Different Types of .. - Kejariwal, Tian.. (2006) (Correct)
Enhancing Software Reliability With Speculative Threads - And The Committee (Correct)
Compiler Optimization of Value Communication for Thread-Level.. - Zhai (2005) (Correct)
Similar documents (at the sentence level):
76.2%: Value Locality And Speculative Execution - Lipasti (1997) (Correct)
21.5%: Exploiting Value Locality to Exceed the Dataflow Limit - Lipasti, Shen (1998) (Correct)
10.0%: Exceeding the Dataflow Limit via Value Prediction - Lipasti, Shen (1996) (Correct)
Active bibliography (related documents): More All
0.5: SPIN - An Extensible Microkernel for.. - Bershad.. (1994) (Correct)
0.4: Can Trace-Driven Simulators Accurately Predict.. - Black, Huang, Lipasti, .. (1996) (Correct)
0.3: Memory Dependence Prediction - Andreas Ioannis Moshovos (Correct)
Similar documents based on text: More All
0.4: SPAID: Software Prefetching in Pointer- and.. - Lipasti, Schmidt.. (1995) (Correct)
0.3: Physical Register Inlining - Lipasti, Mestan, Gunadi (2004) (Correct)
0.2: Dynamic Verification of Cache Coherence Protocols - Jason Cantin Mikko (2001) (Correct)
Related documents from co-citation: More All
50: Exceeding the Dataflow Limit via Value Prediction - Lipasti, Shen - 1996
40: The Predictability of Data Values - Sazeides, Smith - 1997
38: Highly accurate data value prediction using hybrid predictors - Wang, Franklin - 1997
BibTeX entry: (Update)
Mikko H. Lipasti, Christopher B. Wilkerson and John Paul Shen. "Value Locality and Load Value Prediction". ASPLOS VII. October 1996. pp. 138-147. http://citeseer.ist.psu.edu/lipasti96value.html More
@inproceedings{ lipasti96value,
author = "Mikko H. Lipasti and Christopher B. Wilkerson and John Paul Shen",
title = "Value Locality and Load Value Prediction",
booktitle = "Architectural Support for Programming Languages and Operating Systems",
pages = "138-147",
year = "1996",
url = "citeseer.ist.psu.edu/lipasti96value.html" }
Citations (may not include all citations):1399 Compilers principles (context) - Aho, Sethi et al. - 1986
443 Improving direct-mapped cache performance by the addition of.. - Jouppi - 1990
386 ATOM: A system for building customized program analysis tool.. (context) - Srivastava, Eustace - 1994
344 Design and evaluation of a compiler algorithm for prefetchin.. - Mowry, Lam et al. - 1992
137 Lockup-free instruction fetch/prefetch cache organization (context) - Kroft - 1981
137 Compiler optimizations for improving data locality - Carr, McKinley et al. - 1994
70 Two-level adaptive training branch prediction - Yeh, Patt - 1991
52 A modified approach to data cache management - Tyson, Farrens et al. - 1995
50 Data access microarchitecture for superscalar processors wit.. - Chen, Mahlke et al. - 1991
41 and Allan Porterfield (context) - Callahan, Kennedy - 1991
38 Zero-cycle loads: Microarchitecture support for reducing loa.. - Austin, Sohi - 1995
35 Caching function results: Faster arithmetic by avoiding unne.. (context) - Richardson - 1992
32 Link-time optimization of address calculation on a 64-bit ar.. - Srivastava, Wall - 1994
31 the performance enhancement of paging systems through progra.. (context) - Abu-Sufah, Kuck et al. - 1981
31 Computing Surveys (context) - Smith, memories - 1982
26 store instruction latencies (context) - Abraham, Sugumar et al. - 1993
25 An architectural alternative to optimizing compilers (context) - Harbison - 1982
21 Architectural and organizational tradeoffs in the design of .. - Jouppi - 1988
17 Performance evaluation of the PowerPC 620 microarchitecture (context) - Diep, Nelson et al. - 1995
17 VMW: A visualization -based microarchitecture workbench (context) - Diep, Shen - 1995
17 A performance study of software and hardware data prefetchin.. (context) - Chen, Baer - 1994
15 Predicting and precluding problems with memory latency (context) - Roland, Dollas - 1994
11 Internal architecture of Alpha 21164 microprocessor (context) - Bannon, Keller - 1995
5 A study of branch prediction techniques (context) - Smith - 1981
5 The PowerPC 620 microprocessor: A high performance superscal.. (context) - Levitan, Thomas et al. - 1995
4 A Computer Architecture for the Dynamic Optimization of High.. (context) - Harbison - 1980
4 Comparing RISC microprocessors (context) - Gwennap - 1994
2 Evaluating runtime-compiled (context) - Keppel, Eggers et al. - 1993
The graph only includes citing articles where the year of publication is known.
Documents on the same site (http://davinci.snu.ac.kr/links/ilp/): More
Multiscalar Processors - Sohi (1995) (Correct)
Memory Bandwidth Limitations of Future Microprocessors - Burger (1996) (Correct)
Simultaneous Multithreading: Maximizing On-Chip Parallelism - Tullsen, Eggers, Levy (1995) (Correct)
Online articles have much greater impact More about CiteSeer.IST Add search form to your site Submit documents Feedback
CiteSeer.IST - Copyright Penn State and NEC