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Recent Development in High Level Synthesis
y
Youn-Long Lin
Department of Computer Science
Tsing Hua University
Hsin-Chu, Taiwan 30043, R. ... (Update)
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6: The High Level Synthesis of Digital Systems (context) - McFarland, Parker et al. - 1990
5: A Formal Approach to the Scheduling Problem in High Level Synthesis (context) - Hwang, Lee et al. - 1991
5: Force Directed Scheduling for the Behavioral Synthesis of ASICs (context) - Paulin, Knight - 1989
BibTeX entry: (Update)
Y.-L. Lin, "Recent Developments in High-Level Synthesis," ACM Tansactions on Design Automation of Electronic Systems, vol. 2, no. 1, pp. 2--21, 1997. http://citeseer.ist.psu.edu/lin97recent.html More
@article{ lin97recent,
author = "Youn-Long Lin",
title = "Recent developments in high-level synthesis",
journal = "ACM Transactions on Design Automation of Electronic Systems.",
volume = "2",
number = "1",
pages = "2--21",
year = "1997",
url = "citeseer.ist.psu.edu/lin97recent.html" }
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Specification Partitioning for System Design (context) - Vahid, Gajski - 1992
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Behavioral Transformations for Algorithmic Level IC Design
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A Scheduling Algorithm for Conditional Resource Sharing -- A.. (context) - Kim, Yonezawa et al. - 1994
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Algorithmic and Register-Transfer Level Synthesis: The Syste.. (context) - Thomas, Lagnese et al. - 1990
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Partitioning of Functional Models of Synchronous Digital Sys.. (context) - Gupta, De Micheli - 1990
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PHIDEO: A Silicon Compiler for High Speed Algorithms (context) - Lippens - 1991
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Profile-Driven Behavioral Synthesis for Low-Power VLSI Syste.. (context) - Kumar, Katkoori et al. - 1995
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The Olympus Synthesis System for Digital Design (context) - De Micheli, Ku et al. - 1990
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An Efficient Microcode Compiler for Application Specific DSP.. (context) - Goossens, Rabaey et al. - 1990
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Incorporating Bottom-Up Design into Hardware Synthesis (context) - McFarland, Kowalski - 1990
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CHOP: A Constraint-Driven System Level Partitioner (context) - Kucukcakar, Parker - 1991
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Register-Transfer Level Estimation Techniques for Switching ..
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Data Routing: A Paradigm for Efficient Datapath Synthesis an.. (context) - Lanneer, Cornero et al. - 1994
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Incremental Tree Height Reduction for High Level Synthesis (context) - Nicolau, Potasman - 1991
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HYPER: An Interactive Synthesis Environment for High Perform.. (context) - Chu, Potkonjak et al. - 1989
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Exploiting Regularity for Low-Power Design
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Tree-Height Minimization in Pipelined Architectures (context) - Hartley, Casavant - 1989
13
Incorporating Testability Considerations in High Level Synth.. (context) - Mujumdar, Jain et al. - 1994
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Applying Simulated Evolution to High Level Synthesis (context) - Ly, Mowchenko - 1993
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A Transformation-based Method for Loop folding (context) - Lee, C-H et al. - 1994
12
Power-Profiler: Optimizing ASICs Power Consumption at the Be.. (context) - Martin, Knight - 1995
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Enhancing High-Level Control-Flow for Improved Testability (context) - Hsu, Rudnick et al. - 1996
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Scheduling and Resource Binding for Low Power
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4
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3
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2
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2
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2
Rephasing: A Transformation Technique for the Manipulation o..
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2
High-Level Hot Carrier Reliability-Driven Synthesis using Ma.. (context) - Karnik, Teng et al. - 1995
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ANSA: A New Neural Net Based Scheduling Algorithm for High L.. (context) - Unaltuna, Pitchumani - 1995
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Extended 0/1 LP Formulation for the Scheduling Problem in Hi.. (context) - Achatz - 1993
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1
Operation Scheduling by Annealed Neural Networks (context) - Kawaguchi, Todaka - 1995
1
Using HYPER to Teach Datapath Design Techniques in an ASIC D.. (context) - Reese - 1994
1
Concurrent Testing in High Level Synthesis (context) - Singh, Knight - 1994
1
The Reduction of the Number of Equations in the ILP Formulat.. (context) - Wang, Grainger - 1994
1
Synthesis-for-testability using Transformations (context) - Potkonjak, Dey et al. - 1995
1
A New Look at Logic Synthesis (context) - Darringer, Joyner - 1980
1
A Survey of High Level Synthesis (context) - Walker, Camposano - 1991
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