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Abstract: ues.Previous workincore-basedsystemdesignhasmainlyfocusedon performanceandcostconstraints.Somerecentworkhas beenpresentedinco-synthesisforlowpower[1,2].However, thetrade-offinenergydissipationamongsoftware 1 , memoryandhardwarehasnotyetbeenexplored.Thisis achallengingandindispensabletaskforthedesignoflow powerembeddedsystems.Considerforexample,thatthe useofabiggercachecanreducethenumberofcachemisses andspeedupthesoftwareexecution,whichmaycauseless... (Update)
Cited by: More
Power Optimization and Management in Embedded Systems - Massoud Pedram University (2001) (Correct)
Cache Optimization For Embedded Processor Cores: An.. - Arijit Ghosh And (Correct)
System-Level Exploration for Pareto-Optimal - Configurations In Parameterized (Correct)
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0.5: Energy-Conscious HW/SW-Partitioning of Embedded Systems: A Case .. - Henkel, Li (1998) (Correct)
0.4: A Low Power Hardware/Software Partitioning Approach for.. - Henkel (1999) (Correct)
0.2: Interface and Cache Power Exploration for Core-Based.. - Givargis, Henkel, Vahid (1999) (Correct)
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BibTeX entry: (Update)
Y. Li and J. Henkel. A framework for estimating and minimizing energy dissipation of embedded HW/SW systems. In Proc. Design Automation Conf., pages 188--193, June 1998. http://citeseer.ist.psu.edu/li98framework.html More
@inproceedings{ liframework,
author = "Yanbing Li and J{\"o}g Henkel",
title = "A Framework for Estimating and Minimizing Energy Dissipation of Embedded {HW/{SW}} Systems",
pages = "188--193",
url = "citeseer.ist.psu.edu/li98framework.html" }
Citations (may not include all citations):119 An Enhanced Access and Cycle Time Model for On-Chip Caches - Wilton, Jouppi - 1994
91 Instruction Level Power Analysis and Optimization of Softwar.. - Tiwari, Malik et al. - 1996
74 Analytical Energy Dissipation Models For Low Power Caches - Kamble, Ghose - 1997
48 Trends in Low-Power RAM Circuit Technologies (context) - Itoh, Sasaki et al. - 1995
37 COSYN: Hardware-Software CoSynthesis of Embedded Systems' Pr.. - Dave, Lakshminarayana et al. - 1997
27 System-Level Synthesis of Low-Power Hard RealTime Sys ems - Kirovski, Potkonjak - 1997
21 Architectural Exploration and Optimization of Local Memory i.. - Panda, Dutt et al. - 1997
17 Fast Timing Analysis for HardwareSoftware Co-Synthesis (context) - Ye, Ernst et al. - 1993
11 Power and Performance Simulator: ESP and its Application for.. (context) - Sato, Nagamatsu et al. - 1994
11 Potential-Driven Statistical Ordering of Transformations - Hong, Kirovski et al. - 1997
9 Logic and system design for low power consumption (context) - Tiwari - 1996
9 Power-Conscious Software Design -- a framework for modeling .. (context) - Ong, Ynn - 1994
6 WARTWisconsin Architectural Research Tool Set (context) - Lebeck, Architectural et al.
6 Energy Dissipation in General Purpose Processors (context) - Gonzales, Horowitz - 1995
5 The SUIF Library: A set of core routines for manipulating SU.. (context) - Group - 1994
1 of Symposium on Low Power Electronics and Design (context) - Mehta, Owens et al. - 1997
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