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Instruction Balance and its Relation to Program Energy Consumption (2001)  (Make Corrections)  (2 citations)
Tao Li, Chen Ding



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Abstract: A computer consists of multiple components such as functional units, cache and main memory. At each moment of execution, a program may have a varied amount of work for each component. Recent development has exploited this imbalance to save energy by slowing the components that have a lower load. Example techniques include dynamic scaling and clock gating used in processors from Transmeta and Intel. (Update)

Context of citations to this paper:   More

...power saving. In particular, compiler researchers studied the interaction between program transformation and frequency voltage scaling [15, 5, 23]. Exploiting schedule slacks to reduce power consumed by execution unit is attracting increasing attention [41, 20] In contrast to...

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BibTeX entry:   (Update)

Tao Li and Chen Ding. Instruction balance and its relation to program energy consumption. In Proceedings of International Workshop on Languages and Compilers for Parallel Computing, Kentucky, Aug 2001. http://citeseer.ist.psu.edu/li01instruction.html   More

@techreport{ li01instruction,
    author = "Tao Li and Chen Ding",
    title = "Instruction Balance, Energy Consumption and Program Performance",
    number = "TR739",
    year = "2001",
    url = "citeseer.ist.psu.edu/li01instruction.html" }
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386   ATOM: A system for building customized program analysis tool.. (context) - Srivastava, Eustace - 1994
91   Instruction level power analysis and optimization of softwar.. - Tiwari, Maik et al. - 1996
69   Estimating interlock and improving balance for pipelined mac.. - Callahan, Cocke et al. - 1988
62   Energy-driven integrated hardware-software optimizations usi.. - Vijaykrishnan, Kandemir et al. - 2000
55   Power aware page allocation - Lebeck, Fan et al. - 2000
47   Storage alternatives for mobile computers - Douglis, Caceres et al. - 1994
43   Processor design for portable systems - Burd, Brodersen - 1996
38   Low power architecture design and compilation techniques for.. - Su, Tsui et al. - 1994
34   Compiler-directed dynamic frequency and voltage scaling - Hsu, Kremer et al. - 2000
19   Software power estimation and optimization for high performa.. - Russell, Jacome - 1998
17   Memory bandwidth bottleneck and its amelioration by a compil.. - Ding, Kennedy - 2000
15   ective bandwidth through compiler enhancement of global cach.. (context) - Ding, Kennedy - 2001
8   a microprocessor for portable computers (context) - Gary - 1994
5   Improving the ratio of memory operations to oatingpoint oper.. (context) - Carr, Kennedy - 1994
3   Power analysis of embedded software: a rst step towards soft.. (context) - Tiwari, Maik et al. - 1994
3   Cache designs for energy eciency (context) - Despain, Su - 1995
2   Wattch: A framework for architecturallevel analysis and opti.. (context) - Brooks, Tiwari et al. - 2000
2   Maximizing pipelined functional unit usage for minimum power.. - Yang, Gao et al. - 2001
1   Energy-ecient processor design using multiple clock domains .. (context) - Semeraro, Grigorios et al. - 2001

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