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Abstract: This paper presents a system level approach for the synthesis of hard real-time multitask application specific systems. The algorithm takes into account task precedence constraints among multiple hard real-time tasks and targets a multiprocessor system consisting of a set of heterogeneous off-the-shelf processors. The optimization goal is to select a minimal cost multi-subset of processors while satisfying all the required timing and precedence constraints. There are three design phases:... (Update)
Context of citations to this paper: More
...In [Yen97] performance estimation is based on a preemptive scheduling strategy with static priorities using rate monotonic analysis. In [Lee99] an earlier deadline first strategy is used for non preemptive scheduling of processes with possible data dependencies. Preemptive and...
...remains computationally tractable. Lee et al. developed an A search algorithm in order to optimize embedded system resource allocations [74]. This algorithm uses earliest deadline first scheduling integrated with a load balancing assignment algorithm borrowed from...
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BibTeX entry: (Update)
C. Lee, M. Potkonjak, W. Wolf, "Synthesis of Hard Real-Time Application Specific Systems", Design Automation for Embedded Systems, 4(4), 215-241, 1999. 111 http://citeseer.ist.psu.edu/lee99synthesis.html More
@misc{ lee99synthesis,
author = "C. Lee and M. Potkonjak and W. Wolf",
title = "Synthesis of Hard Real-Time Application Specific Systems",
text = "C. Lee, M. Potkonjak, W. Wolf, Synthesis of Hard Real-Time Application
Specific Systems, Design Automation for Embedded Systems, 4(4), 215-241,
1999. 111",
year = "1999",
url = "citeseer.ist.psu.edu/lee99synthesis.html" }
Citations (may not include all citations):4212 Computers and Intractability: A Guide to the Theory of NP-Co.. (context) - Garey, Johnson - 1979
1582 Scheduling algorithms for multiprogramming in a hard real-ti.. - Liu, Layland - 1973
1575 Computer Architecture: A Quantitative Approach (context) - Patterson, Hennessy - 1990
782 Artificial Intelligence: A Modern Approach (context) - Russel, Norvig - 1995
336 The rate monotonic scheduling algorithms - exact characteriz.. (context) - Lehoczky, Sha et al. - 1986
275 Shade: A fast instruction-set simulator for execution profil.. - Cmelik, Keppel - 1993
217 High-level Synthesis: Introduction to Chip and System Design (context) - Gajski - 1992
151 Force-directed scheduling for the behavioral synthesis of AS.. (context) - Paulin, Knight - 1989
138 The high-level synthesis of digital systems (context) - McFarland, Parker et al. - 1990
137 Hardware-software cosynthesis for digital systems - Gupta, De Micheli - 1993
106 Hardware-software co-design of embedded systems (context) - Wolf - 1994
105 Implications of classical scheduling results for real-time s.. - Stankovic, Spuri et al. - 1995
82 Real-time scheduling theory and Ada (context) - Sha, Goodenough - 1990
69 Generalized rate-monotonic scheduling theory: A framework fo.. (context) - Sha, Rajkumar et al. - 1994
57 Scheduling algorithms and operating system support for real-.. - Ramamritham, Stankovic - 1994
45 Communication synthesis for distributed embedded systems (context) - Yen, Wolf - 1995
44 A Survey of High-level Synthesis Systems (context) - Walker, Camposano - 1991
42 Optimizing resource utilization using transformations (context) - Potkonjak, Rabaey - 1994
41 Analyzing the multimedia operating systems (context) - Steinmetz - 1995
36 A method for partitioning UNITY language in hardware and sof.. - Barros, Rosenstiel et al. - 1994
32 Optimal sequencing of a single machine subject to precedence.. (context) - Lawler - 1973
31 Maximally fast and arbitrarily fast implementation of linear.. (context) - Potkonjak, Rabaey - 1992
31 Task allocation in fault-tolerant distributed systems (context) - Bannister, Trivedi - 1983
29 Estimating implementation bounds for real time DSP applicati.. (context) - Rabaey, Potkonjak - 1994
26 A system-design methodology: Executable specification refine.. (context) - Gajski, Vahid et al. - 1994
25 Interactive system-level partitioning with PARTIF (context) - Ismail, O'Brien et al. - 1994
16 Computing lower bounds on functional units before scheduling - Chaudhuri, Walker - 1996
14 Synthesis of application-specific multiprocessor systems inc.. (context) - Prakash, Parker - 1994
13 Circuits layout (context) - Soukup - 1981
13 Cost optimization in ASIC implementation of periodic hard re.. - Potkonjak, Wolf - 1995
12 High-level synthesis for reconfigurable datapath structures (context) - Guerra, Potkonjak et al. - 1993
10 The network computer and its future (context) - Brodersen - 1997
10 Hyper-LP: A design system for power minimization using archi.. (context) - Chandrakasan - 1992
9 Transformation-based high-level synthesis of fault-tolerant .. (context) - Karri, Orailoglu - 1992
8 Optimal and heuristic algorithms for solving the binding pro.. (context) - Rim, Mujumdar et al. - 1994
7 Partial evaluation of high-level imperative programming lang.. (context) - Nirkhe, Pugh - 1992
6 Software timing analysis using HW/SW cosimulation and instru.. (context) - Liu, Lajolo et al. - 1998
6 Generalized best-first strategies and the optimality (context) - Dechter, Pearl - 1985
5 Real-time scheduling support in Futurebus (context) - Sha, Rajkumar et al. - 1990
3 Technologies for multimedia systems on a chip (context) - Borel - 1997
3 Design of a fault tolerant airborne digital computer (context) - Ratner, Shapiro et al. - 1973
3 System design methodologies: Aiming at the 100 h design cycl.. (context) - Gajski, Narayan et al. - 1996
2 Guaranteed performance of multimedia traffic over the token .. (context) - Nagarajan, Vogt - 1992
2 ATM scheduling with queuing delay predictions (context) - Schwartz - 1993
2 Personal communication (context) - Guerra - 1997
1 Multimedia impact on devices in the 21st century (context) - Yasuda - 1997
1 Lecture notes in computer science 809: Fast software encrypt.. (context) - Schneier - 1994
1 Recommended Practice (context) - Futurebus - 1993
1 The design of a low cost motion chair for video games and mp.. (context) - Huang, Yen et al. - 1996
1 Adding fast interrupts to superscalar processors - Dana - 1994
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