| Alternate document: Details Models and Methods for HW/SW Intellectual Property Interfacing (98) Ross B. Ortega, Luciano Lavagno, Gaetano Borriello |
| Alternate document: Details Models and Methods for HW/SW Intellectual Property Interfacing (98) Ross B. Ortega, Luciano Lavagno, Gaetano Borriello |
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Abstract: In the near future, most objects of common use will contain electronics to augment their functionality, performance, and safety. Hence, time-tomarket, safety, low-cost, and reliability will have to be addressed by any system design methodology. A fundamental aspect of system design is the specification process. We advocate using an unambiguous formalism to represent design specifications and design choices. This facilitates tremendously efficiency of specification, formal verification, and... (Update)
Context of citations to this paper: More
.... execution and communication delays, which is separated and independent from an architectural model that represents an implementation variant [15]. By mapping the functionality onto the architecture, a specific system partitioning is chosen. The system models are transformed into...
...the areas of modeling and verification of embedded systems. 3. 1 Modeling Many models have been proposed to represent embedded systems [Lav99], Edw97] including extensions to finite state machines, data flow graphs, communicating processes, and Petri nets, among others. Some...
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BibTeX entry: (Update)
Lavagno, L. ; A. Sangiovanni-Vincentelli; E. Sentovich "Models of Computation for Embedded System Design" still unpublished, Sept 1998 http://citeseer.ist.psu.edu/lavagno98model.html More
@misc{ lavagno98models,
author = "L. Lavagno and E. Sangiovanni-Vincentelli",
title = "Models of Computation for Embedded System Design",
text = "Lavagno, L. ; A. Sangiovanni-Vincentelli; E. Sentovich Models of Computation
for Embedded System Design still unpublished, Sept 1998",
year = "1998",
url = "citeseer.ist.psu.edu/lavagno98model.html" }
Citations (may not include all citations):2732 Communicating sequential processes (context) - Hoare - 1978
1933 Communication and Concurrency (context) - Milner - 1989
1726 Graph-based algorithms for boolean function manipulation - Bryant - 1986
1174 Statecharts: A visual formalism for complex systems - Harel - 1987
413 Petri Net Theory and the Modeling of Systems (context) - Peterson - 1981
346 Denotational Semantics: The Scott-Strachey Approach to Progr.. (context) - Stoy - 1977
302 The semantics of a simple language for parallel programming (context) - Kahn - 1974
297 Statemate: A working environment for the development of comp.. - Harel, Lachover et al. - 1990
297 Symbolic model checking (context) - McMillan - 1993
277 Ptolemy: a framework for simulating and prototyping heteroge.. - Buck, Ha et al. - 1990
270 Synchronous Programming of Reactive Systems (context) - Halbwachs - 1993
235 The synchronous data flow programming language LUSTRE - Halbwachs, Caspi et al. - 1991
232 Linda in context (context) - Carriero, Gelernter - 1989
211 The synchronous approach to reactive and real-time systems (context) - Benveniste, Berry - 1991
210 Synchronous data flow (context) - Lee, Messerschmitt - 1987
207 A stubborn attack on state explosion (context) - Valmari - 1992
184 Automata for Modeling Real-Time Systems (context) - Alur, Dill - 1990
168 Petri Nets: An Introduction (context) - Reisig - 1985
161 Hardware-Software Co-design of Embedded Systems -- The POLIS.. (context) - Balarin, Sentovich et al. - 1997
151 Sequential Circuit Design Using Synthesis and Optimization (context) - Sentovich, Singh et al. - 1992
134 The Verilog Hardware Description Language (context) - Thomas, Moorby - 1991
106 Dataflow process networks - Lee, Parks - 1995
94 The foundations of esterel - Berry - 1998
79 The ESTEREL language (context) - Boussinot, De Simone - 1991
74 Software Synthesis from Dataflow Graphs (context) - Bhattacharyya, Murthy et al. - 1996
73 Interface-based design (context) - Rowson, Sangiovanni-Vincentelli - 1997
72 Hybrid dynamical systems theory and the SIGNAL language (context) - Benveniste, Le Guernic - 1990
71 Scheduling Dynamic Dataflow Graphs with Bounded Memory Using.. - Buck - 1993
69 Free choice Petri nets (context) - Desel, Esparza - 1995
65 Institut fur Instrumentelle Mathematik (context) - Petri, Automaten et al. - 1962
64 Marked directed graphs (context) - Commoner, Holt - 1971
57 The Argos language: Graphical representation of automata and.. - Maraninchi - 1991
53 Elementary transition systems (context) - Nielsen, Rozenberg et al. - 1992
52 Properties of a model for parallel computations: Determinacy (context) - Karp, Miller - 1966
47 Constructive analysis of cyclic circuits - Shiple, Berry et al. - 1996
43 Data flow languages (context) - Ackerman - 1982
37 A hardware implementation of pure Esterel - Berry - 1991
36 The Formal description technique Lotos (context) - van Eijk, Vissers et al. - 1989
34 A comparison of statecharts variants (context) - von der Beeck - 1994
32 Representing and Modeling Digital Circuits (context) - Rokicki - 1993
32 Automata-Theoretic Verification of Coordinating Processes (context) - Kurshan - 1994
24 IEEE standard VHDL language reference manual (context) - Electrical, Engineers - 1994
23 Geometric parallelism and cyclostatic dataflow in GRAPE-II (context) - Lauwereins, Wauters et al. - 1994
20 Tdfl: A task-level dataflow language (context) - Suhler, Biswas et al. - 1990
19 An integrated visual language and software development envir.. (context) - Rasure, Williams - 1991
17 Static scheduling of multi-rate and cyclo-static DSP applica.. (context) - Bilsen, Engels et al. - 1994
16 Formal verification of embedded systems based on CFSM networ.. - Balarin, Hsieh et al. - 1996
9 Comparing models of computation - Lee, Sangiovanni-Vincentelli - 1996
9 Deriving Petri nets from finite transition systems - Cortadella, Kishinevsky et al. - 1998
8 Parallel execution of GLU programs (context) - Jagannathan - 1992
8 Processing graph method specification version (context) - Kaplan - 1987
8 An automaton model for scheduling constraints in synchronous.. (context) - Takach, Wolf - 1995
8 Schedule validation for embedded reactive real-time systems - Balarin, Sangiovanni-Vincentelli - 1997
8 Hybrid control for automotive engine management: The cut-off.. (context) - Balluchi, Di Benedetto et al. - 1997
7 software codesign of embedded systems (context) - Chiodo, Giusto et al. - 1994
7 Automatic Symbolic Verification of Real-Time Concurrent Syst.. (context) - Burch - 1992
7 Advances in Asynchronous Circuit Theory -- Part I: Gate and .. (context) - Brzozowski, Seger - 1990
6 Proving non-reachability by modulo-invariants (context) - Desel, Neuendorf et al. - 1996
6 Implementing reactive programs on circuits: A hardware imple.. (context) - Rocheteau, Halbwachs - 1992
5 The tagged signal model - a preliminary version of a denotat.. (context) - Lee, Sangiovanni-Vincentelli - 1996
2 the power of bounded concurrency (context) - Drusinski, Harel - 1994
1 Quasi-static scheduling of free-choice petri nets (context) - Sgroi, Lavagno et al. - 1997
1 Technical Report UCB/ERL M (context) - Henzinger, of - 1996
The graph only includes citing articles where the year of publication is known.
Documents on the same site (http://www-cad.eecs.berkeley.edu/Respep/Research/hsc/class/ee249/publication.html): More
Automatic Synthesis of Interfaces between Incompatible.. - Passerone, Rowson, Alberto (1997) (Correct)
Models and Methods for HW/SW Intellectual Property.. - Ortega, Lavagno, Borriello (1998) (Correct)
Design of Embedded Systems: Formal Models.. - Edwards, Lavagno.. (1997) (Correct)
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