(Enter summary)
Abstract: The emergence of several communication architectures for
System-on-Chips provides designers with a variety of design alternatives.
In addition, the need to customize the system architecture
for a specific application or domain, makes it critical for a
designer to be aware of (and to evaluate) the trade-offs involved
in selecting an optimal system-level communication architecture.
While it is generally known that different communication architectures
may be better suited to serve the needs of... (Update)
Context of citations to this paper: More
.... their pros and cons, none of them uniformly outperform otherstheir performance highly depends on the specific application domains [6][7] 8] In this paper, we focus primarily on the performance analysis of shared bus communication architecture for sacs, especially the case...
.... communication architectures too display a wide variance in their utilization, depending on the communication patterns of applications [31]. The DVS algorithm presented in [29] is a variant of previously proposed history based DVS techniques for processors, and adapts the...
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BibTeX entry: (Update)
K. Lahiri, A. Raghunathan, and S. Dey, "Evaluation of the traffic performance characteristics of system-on-chip communication architectures," in Proc. Int. Conf. VLSI Design, pp. 29--35, Jan. 2001. http://citeseer.ist.psu.edu/lahiri01evaluation.html More
@misc{ lahiri01evaluation,
author = "K. Lahiri and A. Raghunathan and S. Dey",
title = "Evaluation of the traffic performance characteristics of system-on-chip
communication architectures",
text = "K. Lahiri, A. Raghunathan, and S. Dey, Evaluation of the traffic performance
characteristics of system-on-chip communication architectures, in Proc.
Int. Conf. VLSI Design, pp. 29--35, Jan. 2001.",
year = "2001",
url = "citeseer.ist.psu.edu/lahiri01evaluation.html" }
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