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Abstract: Modern cache designs exploit spatial locality by fetching large blocks of data called cache lines on a cache miss. Subsequent references to words within the same cache line result in cache hits. Although this approach benefits from spatial locality, less than half of the data brought into the cache gets used before eviction. The unused portion of the cache line negatively impacts performance by wasting bandwidth and polluting the cache by replacing potentially useful data that would otherwise... (Update)
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...and the next level memory hierarchy. The small line size can increase cache utilization and improve temporal locality. In spatial footprint [7], several neighboring caches lines are fetched at the same time if there are spatial locality among them. This approach is similar to...
...reference history will be required. The cache line size is modified according to the memoryreference history [11] 24] 18] 61] [37]. We can also consider static approaches. The amount of spatial locality is analyzed at compile time. In this method, loop structures...
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BibTeX entry: (Update)
Sanjeev Kumar and Chris Wilkerson. Exploiting spatial locality in data caches using spatial footprints. In Proc. 25th Int. Symp. on Computer Architecture, pages 357--368, 1998. http://citeseer.ist.psu.edu/kumar98exploiting.html More
@inproceedings{ kumar98exploiting,
author = "Sanjeev Kumar and Christopher B. Wilkerson",
title = "Exploiting Spatial Locality in Data Caches Using Spatial Footprints",
booktitle = "{ISCA}",
pages = "357-368",
year = "1998",
url = "citeseer.ist.psu.edu/kumar98exploiting.html" }
Citations (may not include all citations):443 Improving direct-mapped cache performance by the addition of.. - Jouppi - 1990
344 Design and evaluation of a compiler algorithm for prefetchin.. - Mowry, Lam et al. - 1992
234 Cache memories (context) - Smith - 1982
110 Memory bandwidth limitations of future microprocessors - Burger, Goodman et al. - 1996
104 Compiler-based prefetching for recursive data structures - Luk, Mowry - 1996
65 Run-time adaptive cache hierarchy management via reference a.. - Johnson, mei et al. - 1997
52 A modified approach to data cache management - Tyson, Farrens et al. - 1995
50 Data access microarchitectures for superscalar processors wi.. - Chen, Mahlke et al. - 1991
41 SPAID: Software prefetching in pointer- and callintensive en.. - Lipasti, Schmidt et al. - 1995
41 A data cache with multiple caching strategies tuned to diffe.. (context) - Gonzalez, Aliagas et al. - 1995
34 The performance impact of block sizes and fetch strategies (context) - Przybylski - 1990
26 store instruction latencies (context) - Abraham, Sugumar et al. - 1993
22 size choice for cpu cache memories (context) - Smith, block - 1987
19 Run-time spatial locality detection and optimization - Johnson, Merten et al. - 1997
15 Predicting and precluding problems with memory latency (context) - Bolland, Dollas - 1994
15 Decoupled sectored caches: Conciliating low tag implementati.. - Seznec - 1994
6 Cache designs with partial address matching (context) - Liu - 1994
2 An effective on-chip preloading chip scheme to reduce data a.. (context) - Baer, Chen - 1991
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