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Structuring and Automating Hardware Proofs in a Higher-Order Theorem-Proving Environment (1993)  (Make Corrections)  (25 citations)
Ramayya Kumar, Klaus Schneider, Thomas Kropf
Formal Methods in System Design



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Abstract: . In this article we present a structured approach to formal hardware verification by modelling circuits at the register-transfer level using a restricted form of higher-order logic. This restricted form of higher-order logic is sufficient for obtaining succinct descriptions of hierarchically designed register-transfer circuits. By exploiting the structure of the underlying hardware proofs and limiting the form of descriptions used, we have attained nearly complete automation in proving the... (Update)

Context of citations to this paper:   More

.... to model based approaches, they allow the use of abstraction mechanisms [2] for structure, data and time by using hierarchical descriptions [3], complex data types [4] and special temporal operators [5] Especially the abstraction from concrete bitwidths is useful for the...

...but actually most of mathematics. From the viewpoint of verification, this helps notably in expressing modular properties of circuits [KSK93] As a toy example, consider a processor with an adder A and a memory subsystem M connected in such a way that the adder takes its...

Cited by:   More
Hierarchical Verification Using an MDG-HOL Hybrid Tool - Kort, Tahar, Curzon (2001)   (Correct)
Automating the Verification of Parameterized Hardware using a.. - Curzon, Tahar   (Correct)
Reflecting BDDs in Coq - Verma, Goubault-Larrecq, Prasad.. (2000)   (Correct)

Active bibliography (related documents):   More   All
1.5:   Efficient Representation and Computation of Tableaux Proofs - Schneider, Kumar, Kropf (1992)   (Correct)
1.1:   Embedding Hardware Verification within a Commercial Design .. - Kropf, Kumar, Schneider   (Correct)
0.5:   A Methodology for Formal Hardware Verification, with Application.. - Beatty (1993)   (Correct)

Similar documents based on text:   More   All
0.2:   Hardware-Verification using First Order BDDs - Klaus Schneider (1993)   (Correct)
0.2:   Accelerating Tableaux Proofs using Compact Representations - Schneider, Kumar, Kropf (1993)   (Correct)
0.1:   Integrating a First-Order Automatic Prover in the HOL.. - Kumar, Kropf, Schneider (1991)   (Correct)

Related documents from co-citation:   More   All
11:   Introduction to HOL: A Theorem Proving Environment for Higher-Oder Logic (context) - Gordon, Melham - 1993
7:   Why higher-order logic is a good formalism for specifying and verifying hardware (context) - Gordon - 1986
7:   Abstraction mechanisms for hardware verification - Melham - 1987

BibTeX entry:   (Update)

Kumar, R.; Schneider, K.; Kropf, Th.: Structuring and Automating Hardware Proofs in a Higher-Order TheoremProving Environment; Journal of Formal Methods in System Design, Vol.2, No. 2, 1993, pp. 165-230. http://citeseer.ist.psu.edu/kumar93structuring.html   More

@article{ kumar93structuring,
    author = "Ramayya Kumar and Klaus Schneider and Thomas Kropf",
    title = "Structuring and Automating Hardware Proofs in a Higher-Order Theorem-Proving Environment",
    journal = "Formal Methods in System Design",
    volume = "2",
    number = "2",
    pages = "165-223",
    year = "1993",
    url = "citeseer.ist.psu.edu/kumar93structuring.html" }
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The graph only includes citing articles where the year of publication is known.


Documents on the same site (http://goethe.ira.uka.de/~schneider/my_papers/):   More
Alternative Proof Procedures for Finite-State Machines in .. - Schneider, Kumar, Kropf (1993)   (Correct)
Abstraction of Systems with Counters for Symbolic Model.. - Schneider, Logothetis   (Correct)
Automating Most Parts of Hardware Proofs in HOL - Schneider, Kumar, Kropf (1991)   (Correct)

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