L. I. Kontothanassis, R. A. Sugumar, G. J. Faanes, J. E. Smith, M. L. Scott  Home/Search
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Abstract: Traditional supercomputers use a flat multi-bank SRAM memory organization to supply high bandwidth at low latency. Most other computers use a hierarchical organization with a small SRAM cache and slower, cheaper DRAM for main memory. Such systems rely heavily on data locality for achieving optimum performance. This paper evaluates cache-based memory systems for vector supercomputers. We develop a simulation model for a cache-based version of the Cray Research C90 and use the NAS parallel... (Update)
Context of citations to this paper: More
...hierarchy is to minimize traffic between different memory levels. This may be obtained through various techniques, see for example [7, 10, 5, 9]. Our approach is using hashing functions in order to minimize the traffic between two consecutive memory levels. The usual hashing...
...memory usage and reduce memory latency have not always been useful in vector architectures. For example, data caches have been studied [9, 6]; however, the results are mixed, with performance gain or loss depending on working set sizes and the fraction of non unit stride...
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BibTeX entry: (Update)
L. Kontothanassis, R. A. Sugumar, G. J. Faanes, J. E. Smith, and M. L. Scott. Cache performance in vector supercomputers. In Spercomputing, 1994. http://citeseer.ist.psu.edu/kontothanassis94cache.html More
@inproceedings{ kontothanassis94cache,
author = "Leonidas I. Kontothanassis and Rabin A. Sugumar and Greg Faanes and James E. Smith and Michael L. Scott",
title = "Cache performance in vector supercomputers",
booktitle = "Supercomputing",
pages = "255-264",
year = "1994",
url = "citeseer.ist.psu.edu/kontothanassis94cache.html" }
Citations (may not include all citations):250 volume 3 of The Art of Computer Programming (context) - Knuth, Searching - 1973
234 Cache Memories (context) - Smith - 1982
217 NASA Ames Research Center (context) - Bailey, Barton et al. - 1991
78 Data Prefetching in Multiprocessor Vector Cache Memories (context) - Fu, Patel - 1991
22 Performance of Cached DRAM Organizations in Vector Supercomp.. (context) - Hsu, Smith - 1993
8 The Performance Impact of Vector Processor Caches (context) - Gee, Smith - 1992
6 Structural Aspects of the System /360 Model (context) - Liptay - 1968
6 Cache Performance on Vector Processors (context) - So, Zecca - 1988
2 Vector Processing on the Alliant FX/8 Multiprocessor (context) - Abu-Sufah, Malony - 1986
2 Using Cache Memory to Reduce Processor/Memory Traffic (context) - Goodman - 1983
2 Vector System Performance on the IBM (context) - Clark, Wilson - 1986
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