(Enter summary)
Abstract: Stream processors are high-performance programmable
processors optimized to run media applications. Recent
work has shown these processors to be more area- and
energy-efficient than conventional programmable architectures.
This paper explores the scalability of stream architectures
to future VLSI technologies where over a thousand
floating-point units on a single chip will be feasible. Two
techniques for increasing the number of ALUs in a stream
processor are presented: intracluster and... (Update)
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BibTeX entry: (Update)
B. Khailany, W. J. Dally, S. Rixner, U. J. Kapasi, J. D. Owens, and B. Towles, "Exploring the VLSI scalability of stream processors," in International Conference on High Performance Computer Architecture (HPCA-2003. http://citeseer.ist.psu.edu/khailany03exploring.html More
@misc{ khailany03exploring,
author = "B. Khailany and W. Dally and S. Rixner and U. Kapasi and J. Owens and B.
Towles",
title = "Exploring the VLSI scalability of stream processors",
text = "B. Khailany, W. J. Dally, S. Rixner, U. J. Kapasi, J. D. Owens, and B.
Towles, Exploring the VLSI scalability of stream processors, in International
Conference on High Performance Computer Architecture (HPCA-2003.",
year = "2003",
url = "citeseer.ist.psu.edu/khailany03exploring.html" }
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