Srinivas Katkoori, Jay Roy, Ranga Vemuri  Home/Search
Context Related
| uc.edu/~ddel/publi...ivlsidesign96.ps Cached: PS.gz PS PDF This document uses CoBlitz to cache paper downloads. If your firewall is blocking outgoing connections to port 3125, you can use these links to download local copies.
Image Update HelpPS.gz PS PDF From: uc.edu/~ddel/publications...node5 (more) (Enter author homepages) |
Rate this article:      (best)Comment on this article |
Abstract: In this work, we address the problem of register optimization that arises during high-level synthesis from hierarchical behavioral specifications containing a hierarchy of modules such as procedures, functions etc. Register optimization (or register sharing) is the process of grouping carriers in the specification such that each group can be safely assigned to a hardware register. Global register optimization by in-line expansion involves flattening the module hierarchy and using a heuristic... (Update)
Context of citations to this paper: More
...a sequence of operations (variables) for a module or register such that the transition activity is reduced. Katkoori, et.al. [16] present an algorithm for register optimization during high level synthesis. The technique employs a hierarchical optimization phase which...
.... DSS uses enhancements of force directed list scheduling [21, 20] and a hierarchical clique partitioning algorithm for register allocation [25]. dss has been used to generate numerous designs both in the university and industry and has been thoroughly tested using systematic...
Cited by: More
Automated Correctness Condition Generation for Formal.. - Mansouri, Vemuri (1999) (Correct)
High Level Synthesis Techniques for Low Power Design' A.. - Saraju Mohanty Dept (Correct)
Active bibliography (related documents): More All
0.5: Engineering Change Protocols for Behavioral and System.. - Kirovski, Drinic.. (2005) (Correct)
0.4: GLASS: a Graph-Theoretical Approach for Global Binding - Badia, Cortadella (Correct)
0.3: A Parallel Neural Networks Algorithm for the Clique Partitioning .. - Harmanani (2002) (Correct)
Similar documents based on text: More All
0.5: Hierarchical Behavioral Partitioning for Multicomponent.. - Kumar, Srinivasan, Vemuri (1996) (Correct)
0.3: High Level Profiling Based Low Power Synthesis Technique - Katkoori, Kumar, Vemuri (1995) (Correct)
0.3: Architectural Power Estimation Based On Behavior Level Profiling - Katkoori, Vemuri (1996) (Correct)
Related documents from co-citation: More All
2: High-Level VLSI Synthesis (context) - Camposano, Wolf - 1991
BibTeX entry: (Update)
S.Katkoori, et. al., "A Hierarchical Register Optimization Algorithm for Behav- ioral Synthesis", Proc. of 9th Intl. Conf. on VLSI Design, Jan 1996, pp.120-132. http://citeseer.ist.psu.edu/katkoori96hierarchical.html More
@misc{ katkoori96hierarchical,
author = "S. Katkoori",
title = "A Hierarchical Register Optimization Algorithm for Behav- ioral Synthesis",
text = "S.Katkoori, et. al., A Hierarchical Register Optimization Algorithm for
Behav- ioral Synthesis, Proc. of 9th Intl. Conf. on VLSI Design, Jan 1996,
pp.120-132.",
year = "1996",
url = "citeseer.ist.psu.edu/katkoori96hierarchical.html" }
Citations (may not include all citations):3972 Introduction to Algorithms (context) - Cormen, Leiserson et al. - 1990
124 Synthesis and Optimization of Digital Circuits (context) - De Micheli - 1994
49 High Level Synthesis of ASICs Under Timing and Synchronizati.. (context) - Ku, De Micheli - 1992
47 REAL : A Program for REgister ALlocation (context) - Kurdahi, Parker - 1987
44 A Survey of HighLevel Synthesis System (context) - Walker, Camposano - 1991
40 Tutorial on High-Level Synthesis (context) - McFarland, Parker et al. - 1988
36 HAL: A MultiParadigm Approach to Automatic Data Path Synthes.. (context) - Paulin, Knight et al. - 1986
34 The Synthesis Approach to Digital System Design (context) - Michel, Lauther et al. - 1992
31 Wire Routing by Optimizing Channel Assignment Within Large A.. (context) - Hasimoto, Stevens - 1971
21 Facet : A Procedure for the Automated Synthesis of Digital S.. (context) - Tseng, Siewiorek - 1983
19 Distributed Design Space Exploration for High-Level Synthesi.. (context) - Dutta, Roy et al. - 1992
16 Data Path Allocation Based on Bipartite Weighted Matching (context) - Huang, Chen et al. - 1990
5 The ADAM Advanced Design Automation System: Overview, Planne.. (context) - Granacki, Knapp et al. - 1985
5 Automatic Data Path Synthesis (context) - Thomas, Kowalski et al. - 1983
5 Exploiting the Special Structure of Conflict and Compatibili.. (context) - Springer, Thomas - 1990
4 A Global, Dynamic Register Allocation and Binding for a Data.. (context) - Woo - 1990
3 Automatic Synthesis of a Multi-Bus Architecture for DSP (context) - Haroun, Emasry - 1988
3 Finding all cliques of an undirected graph (Algorithm 457 (context) - Bron, Kerbosch - 1973
2 EASY : Multiprocessor Architecture Optimization (context) - Stok, Van Den Born - 1988
1 Extensible Software Platform Software Development Environmen.. (context) - Surma - 1990
Documents on the same site (http://www.ece.uc.edu/~ddel/publications/node5.html): More
Behavioral Synthesis of Analog Systems using.. - Doboli.. (1999) (Correct)
Rapid Prototyping of Reconfigurable Coprocessors - Naren Narasimhan (1996) (Correct)
A Hierarchical Modeling of Analog CMOS Components for Synthesis - Adrian Nunez-Aldana (Correct)
Online articles have much greater impact More about CiteSeer.IST Add search form to your site Submit documents Feedback
CiteSeer.IST - Copyright Penn State and NEC