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Abstract: This thesis describes the design of a simultaneous bidirectional MOS driver on a 0:8m CMOS process. Simulation results show that the driver allow simultaneous bidirectional digital signalling over the same pin at 400 MBits per second. The driver operates with current mode signals to isolate the digital signal from power and ground noise. A small chip with testing circuitry was implemented on a 1:2m CMOS process. Thesis Supervisor: William J. Dally Title: Associate Professor The Design of a... (Update)
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BibTeX entry: (Update)
@misc{ kan-design,
author = "Kin Hong Kan",
title = "The Design of a High Performance Simultaneous Bidirectional MOS Driver",
url = "citeseer.ist.psu.edu/kan93design.html" }
Citations (may not include all citations):7 MOS operational amplifier design - a tutorial overview (context) - Gray, Meyer - 1982
7 Simultaneous bidirectional signalling for IC systems (context) - Lam, Dennison et al. - 1990
3 Fast CMOS ECL receivers with 100-mV worst-case sensitivity (context) - Chappell, Chappell et al. - 1988
2 Implementation of a simultaneous bidirectional I/O pad for i.. (context) - Lee, Dennison et al. - 1991
1 Simulation of transients in VLSI packaging interconnections (context) - Palusinski, Liao et al. - 1990
1 High-performance bidirectional singalling in VLSI systems (context) - Dennison, Lee et al. - 1992
1 Analysis and simulation of multiconductor transmission lines.. (context) - You, Soma - 1990
1 Electrical design considerations for high-speed computer pac.. (context) - Cases - 1991
1 Physical technology for VLSI systems (context) - Hannemann - 1986
1 FX Gate Array Design Manual (context) - Corporation - 1992
1 Delay factors for mainframe computers (context) - Davidson - 1991
1 Computation of transients in lossy VLSI packaging interconne.. (context) - Liao, Palusinski et al. - 1990
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